Module: Mesa
Branch: master
Commit: 671018aa99528a41955654f62120eeea0c5517e1
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=671018aa99528a41955654f62120eeea0c5517e1

Author: Chris Wilson <ch...@chris-wilson.co.uk>
Date:   Wed Feb 23 23:09:36 2011 +0000

intel: gen3 is particular sensitive to batch size

... and prefers a small batch whereas gen4+ prefer a large batch to
carry more state.

Tuning using openarena/padman indicate that a batch size of just 4096 is
best for those cases.

Bugzilla: https://bugs.freedesktop.org/process_bug.cgi
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>

---

 src/mesa/drivers/dri/intel/intel_context.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/intel/intel_context.c 
b/src/mesa/drivers/dri/intel/intel_context.c
index 7dbd9d9..d22fa27 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -746,7 +746,7 @@ intelInitContext(struct intel_context *intel,
 
    driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
                        sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
-   if (intelScreen->deviceID == PCI_CHIP_I865_G)
+   if (intel->gen < 4)
       intel->maxBatchSize = 4096;
    else
       intel->maxBatchSize = sizeof(intel->batch.map);

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