Module: Mesa
Branch: master
Commit: 444fce6398556118629ef01204a7d8ff7af0bea3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=444fce6398556118629ef01204a7d8ff7af0bea3
Author: Paul Berry <stereotype...@gmail.com>
Date: Fri Mar 22 08:47:49 2013 -0700
i965/vs: Generalize attribute setup code in preparation for GS.
This patch introduces a new function,
vec4_visitor::lower_attributes_to_hw_regs(), which replaces registers
of type ATTR in the instruction stream with the hardware registers
that store those attributes. This logic will need to be common
between the vertex and geometry shaders.
Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com>
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 54 +++++++++++++++++++-------------
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
2 files changed, 33 insertions(+), 22 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 693f1dd..2f8e607 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1184,29 +1184,13 @@ vec4_visitor::dump_instructions()
}
}
-int
-vec4_vs_visitor::setup_attributes(int payload_reg)
+/**
+ * Replace each register of type ATTR in this->instructions with a reference
+ * to a fixed HW register.
+ */
+void
+vec4_visitor::lower_attributes_to_hw_regs(const int *attribute_map)
{
- int nr_attributes;
- int attribute_map[VERT_ATTRIB_MAX + 1];
-
- nr_attributes = 0;
- for (int i = 0; i < VERT_ATTRIB_MAX; i++) {
- if (vs_prog_data->inputs_read & BITFIELD64_BIT(i)) {
- attribute_map[i] = payload_reg + nr_attributes;
- nr_attributes++;
- }
- }
-
- /* VertexID is stored by the VF as the last vertex element, but we
- * don't represent it with a flag in inputs_read, so we call it
- * VERT_ATTRIB_MAX.
- */
- if (vs_prog_data->uses_vertexid) {
- attribute_map[VERT_ATTRIB_MAX] = payload_reg + nr_attributes;
- nr_attributes++;
- }
-
foreach_list(node, &this->instructions) {
vec4_instruction *inst = (vec4_instruction *)node;
@@ -1240,6 +1224,32 @@ vec4_vs_visitor::setup_attributes(int payload_reg)
inst->src[i].fixed_hw_reg = reg;
}
}
+}
+
+int
+vec4_vs_visitor::setup_attributes(int payload_reg)
+{
+ int nr_attributes;
+ int attribute_map[VERT_ATTRIB_MAX + 1];
+
+ nr_attributes = 0;
+ for (int i = 0; i < VERT_ATTRIB_MAX; i++) {
+ if (vs_prog_data->inputs_read & BITFIELD64_BIT(i)) {
+ attribute_map[i] = payload_reg + nr_attributes;
+ nr_attributes++;
+ }
+ }
+
+ /* VertexID is stored by the VF as the last vertex element, but we
+ * don't represent it with a flag in inputs_read, so we call it
+ * VERT_ATTRIB_MAX.
+ */
+ if (vs_prog_data->uses_vertexid) {
+ attribute_map[VERT_ATTRIB_MAX] = payload_reg + nr_attributes;
+ nr_attributes++;
+ }
+
+ lower_attributes_to_hw_regs(attribute_map);
/* The BSpec says we always have to read at least one thing from
* the VF, and it appears that the hardware wedges otherwise.
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 8740135..2749859 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -480,6 +480,7 @@ public:
protected:
void emit_vertex();
+ void lower_attributes_to_hw_regs(const int *attribute_map);
virtual dst_reg *make_reg_for_system_value(ir_variable *ir) = 0;
virtual int setup_attributes(int payload_reg) = 0;
virtual void emit_prolog() = 0;
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