Module: Mesa
Branch: master
Commit: 76713ed5d64028a434c15f4eb6572b01e5acacca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76713ed5d64028a434c15f4eb6572b01e5acacca
Author: Chia-I Wu <olva...@gmail.com>
Date: Sat Mar 8 17:22:45 2014 +0800
ilo: remove intel_bo_get_size()
Commit bfa8d21759c5f2b5b0885c696842167bd4c64fee uses it to work around a
hardware limitation. But there are other ways to do it without the need for
intel_bo_get_size().
---
src/gallium/drivers/ilo/ilo_gpe_gen6.h | 15 +--------------
src/gallium/drivers/ilo/ilo_resource.c | 17 +++++++++++++++++
src/gallium/winsys/intel/drm/intel_drm_winsys.c | 6 ------
src/gallium/winsys/intel/intel_winsys.h | 7 -------
4 files changed, 18 insertions(+), 27 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_gpe_gen6.h
b/src/gallium/drivers/ilo/ilo_gpe_gen6.h
index 7d9e93d..52bcd74 100644
--- a/src/gallium/drivers/ilo/ilo_gpe_gen6.h
+++ b/src/gallium/drivers/ilo/ilo_gpe_gen6.h
@@ -731,20 +731,7 @@ gen6_emit_3DSTATE_VERTEX_BUFFERS(const struct ilo_dev_info
*dev,
if (cso->buffer && cso->stride <= 2048) {
const struct ilo_buffer *buf = ilo_buffer(cso->buffer);
const uint32_t start_offset = cso->buffer_offset;
- /*
- * As noted in ilo_translate_format(), we treat some 3-component
- * formats as 4-component formats to work around hardware
- * limitations. Imagine the case where the vertex buffer holds a
- * single PIPE_FORMAT_R16G16B16_FLOAT vertex, and buf->bo_size is 6.
- * The hardware would not be able to fetch it because the vertex
- * buffer is expected to hold a PIPE_FORMAT_R16G16B16A16_FLOAT vertex
- * and that takes at least 8 bytes.
- *
- * For the workaround to work, we query the physical size, which is
- * page aligned, to calculate end_offset so that the last vertex has
- * a better chance to be fetched.
- */
- const uint32_t end_offset = intel_bo_get_size(buf->bo) - 1;
+ const uint32_t end_offset = buf->bo_size - 1;
dw |= cso->stride << BRW_VB0_PITCH_SHIFT;
diff --git a/src/gallium/drivers/ilo/ilo_resource.c
b/src/gallium/drivers/ilo/ilo_resource.c
index cb8e1cb..46eaae6 100644
--- a/src/gallium/drivers/ilo/ilo_resource.c
+++ b/src/gallium/drivers/ilo/ilo_resource.c
@@ -1385,6 +1385,23 @@ buf_create(struct pipe_screen *screen, const struct
pipe_resource *templ)
if (templ->bind & PIPE_BIND_SAMPLER_VIEW)
buf->bo_size = align(buf->bo_size, 256) + 16;
+ if (templ->bind & PIPE_BIND_VERTEX_BUFFER) {
+ /*
+ * As noted in ilo_translate_format(), we treat some 3-component formats
+ * as 4-component formats to work around hardware limitations. Imagine
+ * the case where the vertex buffer holds a single
+ * PIPE_FORMAT_R16G16B16_FLOAT vertex, and buf->bo_size is 6. The
+ * hardware would fail to fetch it at boundary check because the vertex
+ * buffer is expected to hold a PIPE_FORMAT_R16G16B16A16_FLOAT vertex
+ * and that takes at least 8 bytes.
+ *
+ * For the workaround to work, we should add 2 to the bo size. But that
+ * would waste a page when the bo size is already page aligned. Let's
+ * round it to page size for now and revisit this when needed.
+ */
+ buf->bo_size = align(buf->bo_size, 4096);
+ }
+
if (!buf_create_bo(buf)) {
FREE(buf);
return NULL;
diff --git a/src/gallium/winsys/intel/drm/intel_drm_winsys.c
b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
index e68fd45..12ae4aa 100644
--- a/src/gallium/winsys/intel/drm/intel_drm_winsys.c
+++ b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
@@ -405,12 +405,6 @@ intel_bo_unreference(struct intel_bo *bo)
drm_intel_bo_unreference(gem_bo(bo));
}
-unsigned long
-intel_bo_get_size(const struct intel_bo *bo)
-{
- return gem_bo(bo)->size;
-}
-
void *
intel_bo_map(struct intel_bo *bo, bool write_enable)
{
diff --git a/src/gallium/winsys/intel/intel_winsys.h
b/src/gallium/winsys/intel/intel_winsys.h
index d710438..ccc4620 100644
--- a/src/gallium/winsys/intel/intel_winsys.h
+++ b/src/gallium/winsys/intel/intel_winsys.h
@@ -198,13 +198,6 @@ void
intel_bo_unreference(struct intel_bo *bo);
/**
- * Return the real size of \p bo. It may be larger than the size specified
- * in allocation due to alignment and padding requirements.
- */
-unsigned long
-intel_bo_get_size(const struct intel_bo *bo);
-
-/**
* Map \p bo for CPU access. Recursive mapping is allowed.
*
* map() maps the backing store into CPU address space, cached. It will block
_______________________________________________
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-commit
