Module: Mesa
Branch: master
Commit: a3e81f819c20dd50d551de9b7e1280b2bd9c18de
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3e81f819c20dd50d551de9b7e1280b2bd9c18de
Author: Marek Olšák <marek.ol...@amd.com>
Date: Thu Jul 16 14:40:00 2015 +0200
radeonsi: always flush framebuffer caches at the beginning of IBs
better safe than sorry
Reviewed-by: Michel Dänzer <michel.daen...@amd.com>
Reviewed-by: Christian König <christian.koe...@amd.com>
---
src/gallium/drivers/radeonsi/si_hw_context.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c
b/src/gallium/drivers/radeonsi/si_hw_context.c
index 153d3d8..8658056 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -164,7 +164,8 @@ void si_context_gfx_flush(void *context, unsigned flags,
void si_begin_new_cs(struct si_context *ctx)
{
/* Flush read caches at the beginning of CS. */
- ctx->b.flags |= SI_CONTEXT_INV_TC_L1 |
+ ctx->b.flags |= SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER |
+ SI_CONTEXT_INV_TC_L1 |
SI_CONTEXT_INV_TC_L2 |
SI_CONTEXT_INV_KCACHE |
SI_CONTEXT_INV_ICACHE;
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