Module: Mesa
Branch: master
Commit: 82d459a4230c8fcb96fc5e85d00d2c2f4502d1e0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=82d459a4230c8fcb96fc5e85d00d2c2f4502d1e0
Author: Neil Roberts <n...@linux.intel.com>
Date: Tue Nov 24 19:23:14 2015 +0100
i965/gen9: Resolve SRGB color buffers when GL_FRAMEBUFFER_SRGB enabled
SKL can't cope with the CCS buffer for SRGB buffers. Normally the
hardware won't see the SRGB formats because when GL_FRAMEBUFFER_SRGB
is disabled these get mapped to their linear equivalents. In order to
avoid relying on the CCS buffer when it is enabled this patch now
makes it flush the renderbuffers.
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
---
src/mesa/drivers/dri/i965/brw_context.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 1511dd5..0abe601 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -215,6 +215,33 @@ intel_update_state(struct gl_context * ctx, GLuint
new_state)
}
}
+ /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
+ * single-sampled color renderbuffers because the CCS buffer isn't
+ * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
+ * enabled because otherwise the surface state will be programmed with the
+ * linear equivalent format anyway.
+ */
+ if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
+ struct gl_framebuffer *fb = ctx->DrawBuffer;
+ for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
+ struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
+
+ if (rb == NULL)
+ continue;
+
+ struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+ struct intel_mipmap_tree *mt = irb->mt;
+
+ if (mt == NULL ||
+ mt->num_samples > 1 ||
+ _mesa_get_srgb_format_linear(mt->format) == mt->format)
+ continue;
+
+ intel_miptree_resolve_color(brw, mt);
+ brw_render_cache_set_check_flush(brw, mt->bo);
+ }
+ }
+
_mesa_lock_context_textures(ctx);
}
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