Module: Mesa
Branch: master
Commit: e677b3047be30c0990ce72e5debb19c1f5627fc4
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e677b3047be30c0990ce72e5debb19c1f5627fc4

Author: Rob Clark <robcl...@freedesktop.org>
Date:   Sun Dec 13 13:28:59 2015 -0500

freedreno/a4xx: fix fragcoord.z + fragdepth

It seems like disabling earlyz on a4xx also, by defaults, disables
fragcoord.z to the FS.  For frag shaders that both read fragcoord(.z)
and write fragdepth, we need to set some extra bits to prevent a
lockup.

This lets us get rid of the hack of disabling fragcoord.z (which
prevented 0ad from lockups, but resulted in rendering corruption).  Also
fixes fbo-depth-sample-compare.

Signed-off-by: Rob Clark <robcl...@freedesktop.org>

---

 src/gallium/drivers/freedreno/a4xx/fd4_emit.c    |    6 ++++--
 src/gallium/drivers/freedreno/a4xx/fd4_program.c |    4 +---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c 
b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index f220fc7..b9a2814 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -529,14 +529,16 @@ fd4_emit_state(struct fd_context *ctx, struct 
fd_ringbuffer *ring,
 
                OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1);
                OUT_RING(ring, zsa->rb_depth_control |
-                               COND(fragz, 
A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE));
+                               COND(fragz, 
A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE) |
+                               COND(fragz && fp->frag_coord, 
A4XX_RB_DEPTH_CONTROL_FORCE_FRAGZ_TO_FS));
 
                /* maybe this register/bitfield needs a better name.. this
                 * appears to be just disabling early-z
                 */
                OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1);
                OUT_RING(ring, zsa->gras_alpha_control |
-                               COND(fragz, 
A4XX_GRAS_ALPHA_CONTROL_ALPHA_TEST_ENABLE));
+                               COND(fragz, 
A4XX_GRAS_ALPHA_CONTROL_ALPHA_TEST_ENABLE) |
+                               COND(fragz && fp->frag_coord, 
A4XX_GRAS_ALPHA_CONTROL_FORCE_FRAGZ_TO_FS));
        }
 
        if (dirty & FD_DIRTY_RASTERIZER) {
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_program.c 
b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
index 0e861b9..32b8fce 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_program.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
@@ -420,9 +420,7 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct 
fd4_emit *emit,
                        COND(s[FS].v->frag_face, 
A4XX_RB_RENDER_CONTROL2_FACENESS) |
                        COND(s[FS].v->frag_coord, 
A4XX_RB_RENDER_CONTROL2_XCOORD |
                                        A4XX_RB_RENDER_CONTROL2_YCOORD |
-// TODO enabling gl_FragCoord.z is causing lockups on 0ad (but seems
-// to work everywhere else).
-//                                     A4XX_RB_RENDER_CONTROL2_ZCOORD |
+                                       A4XX_RB_RENDER_CONTROL2_ZCOORD |
                                        A4XX_RB_RENDER_CONTROL2_WCOORD));
 
        OUT_PKT0(ring, REG_A4XX_RB_FS_OUTPUT_REG, 1);

_______________________________________________
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-commit

Reply via email to