Module: Mesa Branch: master Commit: 88cc11e971e8e84c2704a86b325a08cbe8ffc354 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=88cc11e971e8e84c2704a86b325a08cbe8ffc354
Author: Rob Clark <robcl...@freedesktop.org> Date: Fri May 20 12:54:29 2016 -0400 freedreno: switch emit_const_bo() to take prsc's We can push the unwrap of pipe_resource down. Signed-off-by: Rob Clark <robdcl...@gmail.com> --- src/gallium/drivers/freedreno/a3xx/fd3_emit.c | 8 ++++---- src/gallium/drivers/freedreno/a4xx/fd4_emit.c | 8 ++++---- src/gallium/drivers/freedreno/freedreno_context.h | 3 ++- src/gallium/drivers/freedreno/ir3/ir3_shader.c | 16 ++++++++-------- 4 files changed, 18 insertions(+), 17 deletions(-) diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c index dc557fa..03b9328 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c @@ -93,7 +93,7 @@ fd3_emit_const(struct fd_ringbuffer *ring, enum shader_t type, static void fd3_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, - uint32_t regid, uint32_t num, struct fd_bo **bos, uint32_t *offsets) + uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets) { uint32_t i; @@ -109,11 +109,11 @@ fd3_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS)); for (i = 0; i < num; i++) { - if (bos[i]) { + if (prscs[i]) { if (write) { - OUT_RELOCW(ring, bos[i], offsets[i], 0, 0); + OUT_RELOCW(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0); } else { - OUT_RELOC(ring, bos[i], offsets[i], 0, 0); + OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0); } } else { OUT_RING(ring, 0xbad00000 | (i << 16)); diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c index 7d602fc..c8658f0 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c @@ -93,7 +93,7 @@ fd4_emit_const(struct fd_ringbuffer *ring, enum shader_t type, static void fd4_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, - uint32_t regid, uint32_t num, struct fd_bo **bos, uint32_t *offsets) + uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets) { uint32_t i; @@ -109,11 +109,11 @@ fd4_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS)); for (i = 0; i < num; i++) { - if (bos[i]) { + if (prscs[i]) { if (write) { - OUT_RELOCW(ring, bos[i], offsets[i], 0, 0); + OUT_RELOCW(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0); } else { - OUT_RELOC(ring, bos[i], offsets[i], 0, 0); + OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0); } } else { OUT_RING(ring, 0xbad00000 | (i << 16)); diff --git a/src/gallium/drivers/freedreno/freedreno_context.h b/src/gallium/drivers/freedreno/freedreno_context.h index 7ce2920..fe2a94c 100644 --- a/src/gallium/drivers/freedreno/freedreno_context.h +++ b/src/gallium/drivers/freedreno/freedreno_context.h @@ -394,8 +394,9 @@ struct fd_context { void (*emit_const)(struct fd_ringbuffer *ring, enum shader_t type, uint32_t regid, uint32_t offset, uint32_t sizedwords, const uint32_t *dwords, struct pipe_resource *prsc); + /* emit bo addresses as constant: */ void (*emit_const_bo)(struct fd_ringbuffer *ring, enum shader_t type, boolean write, - uint32_t regid, uint32_t num, struct fd_bo **bos, uint32_t *offsets); + uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets); /* indirect-branch emit: */ void (*emit_ib)(struct fd_ringbuffer *ring, struct fd_ringmarker *start, diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.c b/src/gallium/drivers/freedreno/ir3/ir3_shader.c index ee0018f..9f39f9f 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_shader.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.c @@ -525,7 +525,7 @@ emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v, if (v->constlen > offset) { uint32_t params = MIN2(4, v->constlen - offset) * 4; uint32_t offsets[params]; - struct fd_bo *bos[params]; + struct pipe_resource *prscs[params]; for (uint32_t i = 0; i < params; i++) { const uint32_t index = i + 1; /* UBOs start at index 1 */ @@ -534,15 +534,15 @@ emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v, if ((constbuf->enabled_mask & (1 << index)) && cb->buffer) { offsets[i] = cb->buffer_offset; - bos[i] = fd_resource(cb->buffer)->bo; + prscs[i] = cb->buffer; } else { offsets[i] = 0; - bos[i] = NULL; + prscs[i] = NULL; } } fd_wfi(ctx, ring); - ctx->emit_const_bo(ring, v->type, false, offset * 4, params, bos, offsets); + ctx->emit_const_bo(ring, v->type, false, offset * 4, params, prscs, offsets); } } @@ -581,7 +581,7 @@ emit_tfbos(struct fd_context *ctx, const struct ir3_shader_variant *v, struct pipe_stream_output_info *info = &v->shader->stream_output; uint32_t params = 4; uint32_t offsets[params]; - struct fd_bo *bos[params]; + struct pipe_resource *prscs[params]; for (uint32_t i = 0; i < params; i++) { struct pipe_stream_output_target *target = so->targets[i]; @@ -589,15 +589,15 @@ emit_tfbos(struct fd_context *ctx, const struct ir3_shader_variant *v, if (target) { offsets[i] = (so->offsets[i] * info->stride[i] * 4) + target->buffer_offset; - bos[i] = fd_resource(target->buffer)->bo; + prscs[i] = target->buffer; } else { offsets[i] = 0; - bos[i] = NULL; + prscs[i] = NULL; } } fd_wfi(ctx, ring); - ctx->emit_const_bo(ring, v->type, true, offset * 4, params, bos, offsets); + ctx->emit_const_bo(ring, v->type, true, offset * 4, params, prscs, offsets); } } _______________________________________________ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit