Mesa (master): radeonsi: move index buffer calculations in si_emit_draw_packets up

[Nicolai Hähnle]

Module: Mesa
Branch: master
Commit: 64ff23a58cd4f5daeb52d5f8e2d37904696d6cb4
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=64ff23a58cd4f5daeb52d5f8e2d37904696d6cb4

Author: Nicolai Hähnle <nicolai.haeh...@amd.com>
Date:   Fri Jul 29 17:56:21 2016 +0100

radeonsi: move index buffer calculations in si_emit_draw_packets up

Reviewed-by: Marek Olšák <marek.ol...@amd.com>

---

 src/gallium/drivers/radeonsi/si_state_draw.c | 21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c 
b/src/gallium/drivers/radeonsi/si_state_draw.c
index 523c2ea..bae0f94 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -520,6 +520,8 @@ static void si_emit_draw_packets(struct si_context *sctx,
        struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
        unsigned sh_base_reg = 
sctx->shader_userdata.sh_base[PIPE_SHADER_VERTEX];
        bool render_cond_bit = sctx->b.render_cond && 
!sctx->b.render_cond_force_off;
+       uint32_t index_max_size = 0;
+       uint64_t index_va = 0;
 
        if (info->count_from_stream_output) {
                struct r600_so_target *t =
@@ -567,6 +569,16 @@ static void si_emit_draw_packets(struct si_context *sctx,
                        assert(!"unreachable");
                        return;
                }
+
+               index_max_size = (ib->buffer->width0 - ib->offset) /
+                                 ib->index_size;
+               index_va = r600_resource(ib->buffer)->gpu_address + ib->offset;
+
+               assert(index_va % 2 == 0);
+
+               radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
+                                     (struct r600_resource *)ib->buffer,
+                                     RADEON_USAGE_READ, 
RADEON_PRIO_INDEX_BUFFER);
        }
 
        if (!info->indirect) {
@@ -608,16 +620,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
        }
 
        if (info->indexed) {
-               uint32_t index_max_size = (ib->buffer->width0 - ib->offset) /
-                                         ib->index_size;
-               uint64_t index_va = r600_resource(ib->buffer)->gpu_address + 
ib->offset;
-
-               radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
-                                     (struct r600_resource *)ib->buffer,
-                                     RADEON_USAGE_READ, 
RADEON_PRIO_INDEX_BUFFER);
-
                if (info->indirect) {
-                       assert(index_va % 2 == 0);
                        assert(info->indirect_offset % 4 == 0);
 
                        radeon_emit(cs, PKT3(PKT3_INDEX_BASE, 1, 0));

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