Module: Mesa
Branch: master
Commit: ee0b6597a9579342029e46bf2bc4a8dd887f7896
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee0b6597a9579342029e46bf2bc4a8dd887f7896
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Thu Nov 17 22:40:29 2016 -0500
swr: [rasterizer memory] minify texture width before alignment
The minification should happen before alignment, not after. See similar
logic on ComputeLODOffsetY. The current logic requires unnecessarily
large textures when there's an initial NPOT size.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.row...@intel.com>
---
src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h
b/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h
index 11ed451..350e44b 100644
--- a/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h
+++ b/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h
@@ -284,8 +284,8 @@ INLINE void ComputeLODOffset1D(
offset = GFX_ALIGN(curWidth, hAlign);
for (uint32_t l = 1; l < lod; ++l)
{
- curWidth = GFX_ALIGN(std::max<uint32_t>(curWidth >> 1, 1U),
hAlign);
- offset += curWidth;
+ curWidth = std::max<uint32_t>(curWidth >> 1, 1U);
+ offset += GFX_ALIGN(curWidth, hAlign);
}
if (info.isSubsampled || info.isBC)
_______________________________________________
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit
