Module: Mesa
Branch: master
Commit: 1b3b4196f08bf825d031cdf6bfcbc7dd3ccf3172
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b3b4196f08bf825d031cdf6bfcbc7dd3ccf3172
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Date: Fri Dec 16 14:22:16 2016 +0100
nv50/ir: do not insert texture barriers on gm107
It's actually useless to insert those texture barriers post RA
because the current control code (ie. st 0x0) will wait for all
dependencies before issuing a new instruction.
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Pierre Moreau <pierre.mor...@free.fr>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index fe18f47..ff253af 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -190,7 +190,8 @@ NVC0LegalizePostRA::NVC0LegalizePostRA(const Program *prog)
: rZero(NULL),
carry(NULL),
pOne(NULL),
- needTexBar(prog->getTarget()->getChipset() >= 0xe0)
+ needTexBar(prog->getTarget()->getChipset() >= 0xe0 &&
+ prog->getTarget()->getChipset() < 0x110)
{
}
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