Module: Mesa
Branch: master
Commit: 0e91d8f38c433bead0b26b4bc83a88f27d9f832a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e91d8f38c433bead0b26b4bc83a88f27d9f832a
Author: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Date: Thu Apr 20 22:03:15 2017 +0200
radv: Prefetch compute shader too.
For consistency, doesn't really impact performance.
Signed-off-by: Bas Nieuwenhuizen <ba...@google.com>
Reviewed-by: Dave Airlie <airl...@redhat.com>
---
src/amd/vulkan/radv_cmd_buffer.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 958ae6e361..40e6e432ae 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2169,6 +2169,7 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer
*cmd_buffer)
va = ws->buffer_get_va(compute_shader->bo);
ws->cs_add_buffer(cmd_buffer->cs, compute_shader->bo, 8);
+ si_cp_dma_prefetch(cmd_buffer, va, compute_shader->code_size);
MAYBE_UNUSED unsigned cdw_max =
radeon_check_space(cmd_buffer->device->ws,
cmd_buffer->cs, 16);
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