Module: Mesa
Branch: master
Commit: f9bfc9301466c3b0d4248627b301d2f37ce0c4ab
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f9bfc9301466c3b0d4248627b301d2f37ce0c4ab
Author: Karol Herbst <karolher...@gmail.com>
Date: Fri Jun 23 20:30:28 2017 +0200
nv50/ir/tgsi: handle precise for most ALU instructions
Signed-off-by: Karol Herbst <karolher...@gmail.com>
Reviewed-by: Pierre Moreau <pierre.mor...@free.fr>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 7bae9e5cac..713331f5c4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -3189,6 +3189,7 @@ Converter::handleInstruction(const struct
tgsi_full_instruction *insn)
geni->subOp = tgsi::opcodeToSubOp(tgsi.getOpcode());
if (op == OP_MUL && dstTy == TYPE_F32)
geni->dnz = info->io.mul_zero_wins;
+ geni->precise = insn->Instruction.Precise;
}
break;
case TGSI_OPCODE_MAD:
@@ -3202,6 +3203,7 @@ Converter::handleInstruction(const struct
tgsi_full_instruction *insn)
geni = mkOp3(op, dstTy, dst0[c], src0, src1, src2);
if (dstTy == TYPE_F32)
geni->dnz = info->io.mul_zero_wins;
+ geni->precise = insn->Instruction.Precise;
}
break;
case TGSI_OPCODE_MOV:
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