URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3eb187f3760866143a9aebe904aefa0e7b0105aa Author: Emil Velikov <emil.veli...@collabora.com> Date: Mon Oct 30 13:52:46 2017 +0000
Update version to 17.3.0-rc2 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c20849f9c30864d5aa183aaf7075916bb7ea4f2 Author: Eric Engestrom <eric.engest...@imgtec.com> Date: Thu Oct 26 17:13:47 2017 +0100 wayland-egl: fix wayland cflags Fixes: 80bfff5c4f1d4d8c842a0 "wayland-egl: adds CFLAGS for wayland.egl.h include" Suggested-by: Daniel Stone <dan...@fooishbar.org> Signed-off-by: Eric Engestrom <eric.engest...@imgtec.com> Acked-by: Emil Velikov <emil.veli...@collabora.com> Acked-by: Tobias Klausmann <tobias.johannes.klausm...@mni.thm.de> (cherry picked from commit 866c8a94d45fd88ea1e3a49c00a0ee5e589e4577) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb09360ea51140ef84f5516ae668299d7a48cc77 Author: Eric Engestrom <eric.engest...@imgtec.com> Date: Wed Oct 25 14:08:58 2017 +0100 vc4: fix release build Mesa's DEBUG and assert's NDEBUG are not tied to each other, so we need to explicitly compile this code out. Fixes: 3df78928786134874eafa "vc4: Drop reloc_count tracking for debug asserts on non-debug builds." Cc: Eric Anholt <e...@anholt.net> Signed-off-by: Eric Engestrom <eric.engest...@imgtec.com> Reviewed-by: Eric Anholt <e...@anholt.net> (cherry picked from commit 5d44e35a8f3967b40db153fdcedb9294d44ae5c4) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=166432283814507a1b69d0546b32dfcd0b107474 Author: Samuel Pitoiset <samuel.pitoi...@gmail.com> Date: Thu Oct 26 18:08:19 2017 +0200 radeonsi: update hack for HTILE corruption in ARK: Survival Evolved It appears that flushing the DB metadata is actually not sufficient since the driver uses the new VS blit shaders. This looks quite strange though, but it seems like we need to flush DB for fixing the corruption. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102955 Fixes: 69ccb9dae7 (radeonsi: use new VS blit shaders (VS inputs in SGPRs) Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Reviewed-by: Marek Olšák <marek.ol...@amd.com> (cherry picked from commit dd79aa4ad30df205076be25f6bbf42768abea20a) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7e625df6966588c4e71a8d13e147792a76215b2 Author: Daniel Stone <dani...@collabora.com> Date: Thu Oct 26 11:56:22 2017 +0100 meson: wayland-egl depends on wayland-client Since wayland-egl.h is currently provided by the core Wayland package, depend on wayland-client to make sure we get it in our include path. Signed-off-by: Daniel Stone <dani...@collabora.com> Acked-by: Emil Velikov <emil.veli...@collabora.com> Fixes: 108d257a16 ("meson: build libEGL") Cc: Tobias Klausmann <tobias.johannes.klausm...@mni.thm.de> Cc: Dylan Baker <dy...@pnwbakers.com> Cc: Gert Wollny <gw.foss...@gmail.com> (cherry picked from commit 9f7ed60b3eae9d3d20805e79c9ab67674619e2cd) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5addf041efe3f5874bbcfa1a950f25f2b192bbf0 Author: Jason Ekstrand <jason.ekstr...@intel.com> Date: Thu Aug 31 11:42:00 2017 -0700 intel/eu: Use EXECUTE_1 for JMPI The PRM says "The execution size must be 1." In 73137997e23ff6c11, the execution size was set to 1 when it should have been BRW_EXECUTE_1 (which maps to 0). Later, in dc2d3a7f5c217a7cee9, JMPI was used for line AA on gen6 and earlier and we started manually stomping the exeution size to BRW_EXECUTE_1 in the generator. This commit fixes the original bug and makes brw_JMPI just do the right thing. Reviewed-by: Matt Turner <matts...@gmail.com> Fixes: 73137997e23ff6c1145d036315d1a9ad96651281 (cherry picked from commit 562b8d458c2de262019da2c056f75cb9feb5ee54) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f4b6883ebc8802d82c2389361b852088b76c00b7 Author: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> Date: Wed Oct 25 03:43:00 2017 +0200 radv: Fix truncation issue hexifying the cache uuid for the disk cache. Going from binary to hex has a 2x blowup. Fixes: 14216252923 'radv: create on-disk shader cache' Reviewed-by: Dave Airlie <airl...@redhat.com> (cherry picked from commit 5bfbab2fdcc5b1fcb3a0d0b8cce19c5492c7de68) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=70ee0a45250c4121b800843d1f5c3c66b78988ff Author: Eric Anholt <e...@anholt.net> Date: Tue Oct 17 15:41:25 2017 -0700 i965: Fix memmem compiler warnings. gcc is throwing this warning in my meson build: ../src/intel/compiler/brw_eu_validate.c:50:11: warning argument 1 null where non-null expected [-Wnonnull] return memmem(haystack.str, haystack.len, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ needle.str, needle.len) != NULL; ~~~~~~~~~~~~~~~~~~~~~~~ The first check for CONTAINS has a NULL error_msg.str and 0 len. The glibc implementation will exit without looking at any haystack bytes if haystack.len < needle.len, so this was safe, but silence the warning anyway by guarding against implementation variablility. Fixes: 122ef3799d56 ("i965: Only insert error message if not already present") Reviewed-by: Matt Turner <matts...@gmail.com> (cherry picked from commit e91c3540fc620b39a16d5bce9fd75aa0ddd7ed7e) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=17d988bfaab755cd4076224b199e9ca56eb68614 Author: Timothy Arceri <tarc...@itsqueeze.com> Date: Tue Oct 24 09:08:55 2017 +1100 radv: move nir print after linking is done We now have linking optimisations so we want to delay dumping the nir until after these are complete. Fixes: 06f05040eb73 (radv: Link shaders) Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> (cherry picked from commit f0a2bbd1a4a0caf85d91469e61d01a126cfc2a36) Squashed with commit: radv: print NIR before LLVM IR and disassembly It's still printed after linking, but it makes more sense to have SPIRV->NIR->LLVM IR->ASM. Fixes: f0a2bbd1a4 (radv: move nir print after linking is done) Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> (cherry picked from commit 9711979df007859de86fc08c20c826a71d10a660) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=03cf1953ad1ac067abe14642e9ea1bb725ba31b8 Author: Dave Airlie <airl...@redhat.com> Date: Mon Oct 23 10:34:54 2017 +1000 mesa/bufferobj: don't double negate the range This fixes a regression I introduced refactoring this code, I managed to invert range twice, I moved the inversion into the common code, but forgot to stop doing it in the callee. Fixes: GL45-CTS.multi_bind.dispatch_bind_buffers_base Fixes: 35ac13ed3 (mesa/bufferobj: consolidate some codepaths between ubo/ssbo/atomics.) Reported-by: Nicolai Hähnle <nicolai.haeh...@amd.com> Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Signed-off-by: Dave Airlie <airl...@redhat.com> (cherry picked from commit 11d688d9f0d2ee4d0178d1807c0075e5e8364b1d) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4fb6b83968f235ea727b55d366e4f412df148c49 Author: Timothy Arceri <tarc...@itsqueeze.com> Date: Mon Oct 23 11:10:47 2017 +1100 radv: clone meta shaders before linking The IR is reused in different pipeline combinations so we need to clone it to avoid link time optimistaions messing up the original copy. Fixes: 06f05040eb73 (radv: Link shaders) Reviewed-by: Dave Airlie <airl...@redhat.com> (cherry picked from commit 013313cf895e4d47b2631d5f4dd32fcbce2b0a17) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=26b44eadac90187b7c0d3fdb21c218d08b657df6 Author: Dylan Baker <dy...@pnwbakers.com> Date: Fri Oct 20 17:34:51 2017 -0700 meson: fix egl build for meson version < 0.43 Meson 0.43 added the ability to pass nested lists to include_directories, so the code that we have works for 0.43, but not for 0.42. This patch changes the include_directories list to be flat so it works with 0.42 fixes: 108d257a16859898f5c ("meson: build libEGL") Tested-by: Vinson Lee <v...@freedesktop.org> Reviewed-by: Rhys Kidd <rhysk...@gmail.com> Reviewed-by: Eric Anholt <e...@anholt.net> Signed-off-by: Dylan Baker <dylanx.c.ba...@intel.com> (cherry picked from commit 77f7ef0287cee23d411b1a2e750d281efe425ff3) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e22cf6e9b4cb3823f5b8115d8c7cfd6deae75006 Author: Kenneth Graunke <kenn...@whitecape.org> Date: Thu Oct 26 11:44:09 2017 -0700 mesa: Accept GL_BACK in get_fb0_attachment with ARB_ES3_1_compatibility. According to the ARB_ES3_1_compatibility specification, glGetFramebufferAttachmentParameteriv is supposed to accept BACK, and it behaves exactly like BACK_LEFT. Fixes a GL error in GFXBench 5 Aztec Ruins. Cc: "17.3 17.2" <mesa-sta...@lists.freedesktop.org> Reviewed-by: Tapani Pälli <tapani.pa...@intel.com> (cherry picked from commit 4f538c3f99b25dc96cd20314ce7785fd4d333be1) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7df1b901b92407fcfc96543ca7db5604cfa4051d Author: Tapani Pälli <tapani.pa...@intel.com> Date: Fri Oct 27 12:54:02 2017 +0300 i965: unref push_const_bo in intelDestroyContext Valgrind shows that leak is caused by gen6_upload_push_constant, add unref push_const_bo per stage to destructor to fix this (like done for scratch_bo). ==10952== 144 bytes in 1 blocks are definitely lost in loss record 44 of 66 ==10952== at 0x4C30A1E: calloc (vg_replace_malloc.c:711) ==10952== by 0x8C02847: bo_alloc_internal.constprop.10 (brw_bufmgr.c:344) ==10952== by 0x8C425C4: intel_upload_space (intel_upload.c:101) ==10952== by 0x8C22ED0: gen6_upload_push_constants (gen6_constant_state.c:154) v2: remove if conditions, brw_bo_unreference handles NULL (Ken, Emil) Fixes: 24891d7c05 ("i965: Store per-stage push constant BO pointers.") Signed-off-by: Tapani Pälli <tapani.pa...@intel.com> Reviewed-by: Emil Velikov <emil.veli...@collabora.com> Reviewed-by: Kenneth Graunke <kenn...@whitecape.org> Cc: mesa-sta...@lists.freedesktop.org (cherry picked from commit 0b131ca427d788ae08426bdeddb8f4bd3c7da202) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cbb8aec81cf55d4ebafbfb60f4a3538d2f10fbef Author: Jason Ekstrand <jason.ekstr...@intel.com> Date: Mon Oct 23 14:25:44 2017 -0700 i965/miptree: Take an isl_format in render_aux_usage Not all rendering matches the miptree format. We allow rendering to texture views so there are cases where it may not match. In those cases, our current scheme of just passing the value of ctx->sRGBEnabled isn't viable. Instead, just do what we do for texturing and pass the view format in directly. Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com> Cc: mesa-sta...@lists.freedesktop.org (cherry picked from commit 39c5c12f8fbee9eec26a627f247d1f3ef7d4bf39) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ff8c152640e9ca657db3c02fed07af5c22af303b Author: Jason Ekstrand <jason.ekstr...@intel.com> Date: Mon Oct 23 14:24:06 2017 -0700 i965/blorp: Use more temporary isl_format variables Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com> Cc: mesa-sta...@lists.freedesktop.org (cherry picked from commit 78e50185d6f9546f8b09cf281f5e5a17195a7ee5) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0fef0c7deb271452f63fad2f77fd256289c2c01a Author: Jason Ekstrand <jason.ekstr...@intel.com> Date: Mon Oct 23 15:51:21 2017 -0700 i965/blorp: Use blorp_to_isl_format for src_isl_format in blit_miptrees Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com> Cc: mesa-sta...@lists.freedesktop.org (cherry picked from commit 94389943b63bf8e25fecbbdf357ae5da100d2fc9) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=66603bff6f15ec00a20f7e13cd71d27c6593ebbd Author: Jason Ekstrand <jason.ekstr...@intel.com> Date: Thu Oct 26 10:08:21 2017 -0700 spirv: Claim support for the simple memory model It's rather surprising that we've never actually hit this before. Aparently, Ian's SPIR-V generator currently claims the Simple when you don't do anything complex. We really shouldn't assert-fail on it. Reviewed-by: Ian Romanick <ian.d.roman...@intel.com> Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> Cc: mesa-sta...@lists.freedesktop.org (cherry picked from commit 8ab9820d34d3a454e455c99e28ed2b6031b25b0f) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0082632eb6b71dd3ee9f7e2fd63205912133e7c Author: Marek Olšák <marek.ol...@amd.com> Date: Sun Oct 22 15:54:23 2017 +0200 radeonsi: add a workaround for weird s_buffer_load_dword behavior on SI See my LLVM patch which fixes the root cause. Users have to apply this patch and then they have 2 choices: - Downgrade to LLVM 5.0 - Update to LLVM git after my LLVM patch is pushed. It won't be possible to use current and earlier development version of LLVM 6.0. Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> Cc: 17.3 <mesa-sta...@lists.freedesktop.org> (cherry picked from commit 3f8e3c2bd8f54ae6817f7496be47f4e1a8860d9c) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3da6dd80039a83ea82bddc098f041aee627e4e94 Author: Leo Liu <leo....@amd.com> Date: Wed Oct 25 09:46:17 2017 -0400 radeon/video: add gfx9 offsets when rejoin the video surface For CPU access. Signed-off-by: Leo Liu <leo....@amd.com> Cc: mesa-sta...@lists.freedesktop.org Reviewed-by: Christian König <christian.koe...@amd.com> (cherry picked from commit ea3dc75d72c148dabffa71e8657bfd831ad0afe9) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e33d680461c8a8d72c0841ff96b69899c08a551 Author: Jason Ekstrand <jason.ekstr...@intel.com> Date: Mon Oct 2 09:53:50 2017 -0700 anv/pipeline: Call nir_lower_system_valaues after brw_preprocess_nir We currently have a bug where nir_lower_system_values gets called before nir_lower_var_copies so it will miss any system value uses which come from a copy_var intrinsic. Moving it to after brw_preprocess_nir fixes this problem. Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com> Cc: mesa-sta...@lists.freedesktop.org (cherry picked from commit 279f8fb69cf68d05287e14f60cf67fc025643bc4) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b699fdd199da2b82fd75eb7d50ab18de70f1acf Author: Jason Ekstrand <jason.ekstr...@intel.com> Date: Fri Sep 1 22:14:59 2017 -0700 anv/pipeline: Drop nir_lower_clip_cull_distance_arrays We already handle it in brw_preprocess_nir Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com> (cherry picked from commit afa0ddb81e693678069c630751e2091eea796937) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a2123968fa1a408018f175bb0cc43839781fd3f3 Author: Jason Ekstrand <jason.ekstr...@intel.com> Date: Wed Sep 6 18:33:38 2017 -0700 intel/fs: Handle flag read/write aliasing in needs_src_copy In order to implement the ballot intrinsic, we do a MOV from flag register to some GRF. If that GRF is used in a SEL, cmod propagation helpfully changes it into a MOV from the flag register with a cmod. This is perfectly valid but when lower_simd_width comes along, it simply splits into two instructions which both have conditional modifiers. This is a problem since we're reading the flag register. This commit makes us check whether or not flags_written() overlaps with the flag values that we are reading via the instruction source and, if we have any interference, will force us to emit a copy of the source. Reviewed-by: Matt Turner <matts...@gmail.com> Cc: mesa-sta...@lists.freedesktop.org (cherry picked from commit fa6e74e33e5bc5f6fba8f9de76b8b059515e708f) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ce3fbeb916d257bd81c81b739cf6d8ec7c56463 Author: Jan Vesely <jan.ves...@rutgers.edu> Date: Sat Oct 21 15:38:54 2017 -0400 clover: Fix compilation after clang r315871 v2: use a more generic compat function v3: rename and formatting cleanup Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103388 Signed-off-by: Jan Vesely <jan.ves...@rutgers.edu> Reviewed-by: Francisco Jerez <curroje...@riseup.net> CC: <mesa-sta...@lists.freedesktop.org> (cherry picked from commit a6d38f476beaaf0a9677cfc168172121b5779570) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f2bc19856f38559be69cac254be248a0cb0c63c Author: Jason Ekstrand <jason.ekstr...@intel.com> Date: Fri Sep 15 16:22:00 2017 -0700 nir/intrinsics: Set the correct num_indices for load_output Cc: mesa-sta...@lists.freedesktop.org Reviewed-by: Timothy Arceri <tarc...@itsqueeze.com> Reviewed-by: Kenneth Graunke <kenn...@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com> (cherry picked from commit c1b84256ccc443a9792893bc780bba970c0dcd4e) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6f0c16a899e87e376ff06394c18f0cd02ea2d86 Author: Matthew Nicholls <mnicho...@feralinteractive.com> Date: Wed Oct 25 14:20:43 2017 +0100 ac/nir: generate correct instruction for atomic min/max on unsigned images v2: fix silly typo Cc: "17.2 17.3" <mesa-sta...@lists.freedesktop.org> Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> (cherry picked from commit 27a0b24bf238342031e0709584e4d71ab228f1ec) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c8eb885538719e40ab4c9b2406052a4fbc9eeab Author: Dave Airlie <airl...@redhat.com> Date: Wed Oct 25 02:23:08 2017 +0100 radv: use device name in cache creation like radeonsi. Not sure how useful this is, but it makes it more consistent. Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> Cc: "17.3" <mesa-sta...@lists.freedesktop.org> Signed-off-by: Dave Airlie <airl...@redhat.com> (cherry picked from commit d8cefaa197f02944812ef535b1b303dd5bf26848) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=afdb9da4920a1f283a628bb8542e24820d75c335 Author: Alex Smith <asm...@feralinteractive.com> Date: Mon Oct 23 10:37:42 2017 +0100 radv: Update code pointer correctly if a variant is already created This was the actual cause of GPU hangs fixed by 0fdd531457ec ("radv: Fix pipeline cache locking issues"), since multiple threads would end up trying to create the variants for a single entry. Now that we're locking around the whole of this function, this isn't really necessary (we either create all or none of the variants), but fix this anyway in case things change later. Signed-off-by: Alex Smith <asm...@feralinteractive.com> Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> CC: 17.3 <mesa-sta...@lists.freedesktop.org> (cherry picked from commit fee9d05e2136b2b7c5a1ad2be7180b99f733f539) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8f10fdf34925be004adda23512773453e2e0009 Author: Kenneth Graunke <kenn...@whitecape.org> Date: Thu Oct 19 14:38:30 2017 -0700 i965: Revert absolute mode for constant buffer pointers. The kernel doesn't initialize the value of the INSTPM or CS_DEBUG_MODE2 registers at context initialization time. Instead, they're inherited from whatever happened to be running on the GPU prior to first run of a new context. So, when we started setting these, other contexts in the system started inheriting our values. Since this controls whether 3DSTATE_CONSTANT_* takes a pointer or an offset, getting the wrong setting is fatal for almost any process which isn't expecting this. Unfortunately, VA-API and Beignet don't initialize this (nor does older Mesa), so they will die horribly if we start doing this. UXA and SNA don't use any push constants, so they are unaffected. Until we have some kind of solution to this problem, I'm going to revert this patch and abandon using the feature for now. It will lead to fewer pushed UBO ranges on Broadwell+, which may lead to lower performance, though I don't have any data on the impact. Cc: "17.3 17.2" <mesa-sta...@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102774 (cherry picked from commit 013d33122028f2492da90a03ae4bc1dab84c3ee9) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea132f926525822dc1f91f6cfd7eb6bfbbc986d7 Author: Nicolai Hähnle <nicolai.haeh...@amd.com> Date: Thu Oct 12 11:21:26 2017 +0200 amd/common/gfx9: workaround DCC corruption more conservatively Fixes KHR-GL45.texture_swizzle.smoke and others on Vega. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102809 Cc: mesa-sta...@lists.freedesktop.org Reviewed-by: Marek Olšák <marek.ol...@amd.com> (cherry picked from commit f9ccfda9bc8166f833fdb64adf1eca5b8ee69251) URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=08b41e70ddd5878174accebe578ba504285bed95 Author: Ilia Mirkin <imir...@alum.mit.edu> Date: Sat Oct 21 15:15:41 2017 -0400 glsl: fix derived cs variables There are two issues with the current implementation. First, it relies on the layout(local_size_*) happening in the same shader as the main function, and secondly it doesn't work for variable group sizes. In both cases, the simplest fix is to move the setup of these derived values to a later time, similar to how the gl_VertexID workarounds are done. There already exist system values defined for both of the derived values, so we use them unconditionally, and lower them after linking is performed. While we're at it, we move to using gl_LocalGroupSizeARB instead of gl_WorkGroupSize for variable group sizes. Also the dead code elimination avoidance can be removed, since there can be situations where gl_LocalGroupSizeARB is needed but has not been inserted for the shader with main function. As a result, the lowering code has to insert its own copies of the system values if needed. Reported-by: Stephane Chevigny <stephane.chevi...@polymtl.ca> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103393 Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com> Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> (cherry picked from commit 4d24a7cb97641cacecd371d1968f6964785822e4) _______________________________________________ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit