Module: Mesa
Branch: master
Commit: 951a5dc4cc29da996b54ae63eeba1915a3a65b4a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=951a5dc4cc29da996b54ae63eeba1915a3a65b4a
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Sat Oct 28 09:02:14 2017 -0700
intel/nir: Use the correct indirect lowering masks in link_shaders
Previously, if we were linking a vec4 VS with a SIMD8/16 FS, we wouldn't
lower indirects on the fragment shader which is wrong. Instead of using
a single indirect mask, take advantage of our new little helper.
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
Cc: mesa-sta...@lists.freedesktop.org
---
src/intel/compiler/brw_nir.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 3f11fb7755..8f3f77f89a 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -686,16 +686,14 @@ brw_nir_link_shaders(const struct brw_compiler *compiler,
NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
- nir_variable_mode indirect_mask = (nir_variable_mode) 0;
- if
(compiler->glsl_compiler_options[(*producer)->info.stage].EmitNoIndirectTemp)
- indirect_mask = nir_var_local;
-
/* The backend might not be able to handle indirects on
* temporaries so we need to lower indirects on any of the
* varyings we have demoted here.
*/
- NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask);
- NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask);
+ NIR_PASS_V(*producer, nir_lower_indirect_derefs,
+ brw_nir_no_indirect_mask(compiler, (*producer)->info.stage));
+ NIR_PASS_V(*consumer, nir_lower_indirect_derefs,
+ brw_nir_no_indirect_mask(compiler, (*consumer)->info.stage));
const bool p_is_scalar =
compiler->scalar_stage[(*producer)->info.stage];
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