Module: Mesa Branch: master Commit: 6ac2d16901927013393f873a34c717ece5014c1a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ac2d16901927013393f873a34c717ece5014c1a
Author: Matt Turner <matts...@gmail.com> Date: Fri Nov 10 14:00:24 2017 -0800 i965/fs: Fix extract_i8/u8 to a 64-bit destination The MOV instruction can extract bytes to words/double words, and words/double words to quadwords, but not byte to quadwords. For unsigned byte to quadword, we can read them as words and AND off the high byte and extract to quadword in one instruction. For signed bytes, we need to first sign extend to word and the sign extend that word to a quadword. Fixes the following test on CHV, BXT, and GLK: KHR-GL46.shader_ballot_tests.ShaderBallotBitmasks Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103628 Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net> --- src/intel/compiler/brw_fs_nir.cpp | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 38d0d357e8..ca3707db90 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -1395,10 +1395,31 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr) case nir_op_extract_u8: case nir_op_extract_i8: { - const brw_reg_type type = brw_int_type(1, instr->op == nir_op_extract_i8); nir_const_value *byte = nir_src_as_const_value(instr->src[1].src); assert(byte != NULL); - bld.MOV(result, subscript(op[0], type, byte->u32[0])); + + /* The PRMs say: + * + * BDW+ + * There is no direct conversion from B/UB to Q/UQ or Q/UQ to B/UB. + * Use two instructions and a word or DWord intermediate integer type. + */ + if (nir_dest_bit_size(instr->dest.dest) == 64) { + const brw_reg_type type = brw_int_type(2, instr->op == nir_op_extract_i8); + + if (instr->op == nir_op_extract_i8) { + /* If we need to sign extend, extract to a word first */ + fs_reg w_temp = bld.vgrf(BRW_REGISTER_TYPE_W); + bld.MOV(w_temp, subscript(op[0], type, byte->u32[0])); + bld.MOV(result, w_temp); + } else { + /* Otherwise use an AND with 0xff and a word type */ + bld.AND(result, subscript(op[0], type, byte->u32[0] / 2), brw_imm_uw(0xff)); + } + } else { + const brw_reg_type type = brw_int_type(1, instr->op == nir_op_extract_i8); + bld.MOV(result, subscript(op[0], type, byte->u32[0])); + } break; } _______________________________________________ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
