Module: Mesa
Branch: master
Commit: c267750bb14f67126bd2a0caa9ec7bb3156d061e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c267750bb14f67126bd2a0caa9ec7bb3156d061e
Author: Rob Clark <robdcl...@gmail.com>
Date: Fri Nov 17 11:18:39 2017 -0500
freedreno/a5xx: stencil texturing support
Signed-off-by: Rob Clark <robdcl...@gmail.com>
---
src/gallium/drivers/freedreno/a5xx/fd5_emit.c | 2 ++
src/gallium/drivers/freedreno/a5xx/fd5_format.c | 7 +++--
src/gallium/drivers/freedreno/a5xx/fd5_texture.c | 35 ++++++++++++++++++------
3 files changed, 34 insertions(+), 10 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
index 2353b8c0ec..58c837cfd1 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
@@ -344,6 +344,8 @@ emit_textures(struct fd_context *ctx, struct fd_ringbuffer
*ring,
OUT_RING(ring, view->texconst3);
if (view->base.texture) {
struct fd_resource *rsc =
fd_resource(view->base.texture);
+ if (view->base.format ==
PIPE_FORMAT_X32_S8X24_UINT)
+ rsc = rsc->stencil;
OUT_RELOC(ring, rsc->bo, view->offset,
(uint64_t)view->texconst5 <<
32, 0);
} else {
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_format.c
b/src/gallium/drivers/freedreno/a5xx/fd5_format.c
index ae5cc839fd..99dd1edc1d 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_format.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_format.c
@@ -104,6 +104,7 @@ static struct fd5_format formats[PIPE_FORMAT_COUNT] = {
V_(R16_USCALED, 16_UINT, NONE, WZYX),
V_(R16_SSCALED, 16_UINT, NONE, WZYX),
VT(R16_FLOAT, 16_FLOAT, R16_FLOAT, WZYX),
+ _T(Z16_UNORM, 16_UNORM, R16_UNORM, WZYX),
_T(A16_UNORM, 16_UNORM, NONE, WZYX),
_T(A16_SNORM, 16_SNORM, NONE, WZYX),
@@ -210,9 +211,11 @@ static struct fd5_format formats[PIPE_FORMAT_COUNT] = {
_T(R9G9B9E5_FLOAT, 9_9_9_E5_FLOAT, NONE, WZYX),
_T(Z24X8_UNORM, X8Z24_UNORM, R8G8B8A8_UNORM, WZYX),
+ _T(X24S8_UINT, 8_8_8_8_UINT, R8G8B8A8_UINT, XYZW),
_T(Z24_UNORM_S8_UINT, X8Z24_UNORM, R8G8B8A8_UNORM, WZYX),
- _T(Z32_FLOAT, 32_FLOAT, R8G8B8A8_UNORM, WZYX),
- _T(Z32_FLOAT_S8X24_UINT, 32_FLOAT,R8G8B8A8_UNORM, WZYX),
+ _T(Z32_FLOAT, 32_FLOAT, R8G8B8A8_UNORM, WZYX),
+ _T(Z32_FLOAT_S8X24_UINT, 32_FLOAT, R8G8B8A8_UNORM, WZYX),
+ _T(X32_S8X24_UINT, 8_UINT, R8_UINT, WZYX),
/* 48-bit */
V_(R16G16B16_UNORM, 16_16_16_UNORM, NONE, WZYX),
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
b/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
index 73ba86f0c3..da35f2a796 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
@@ -198,11 +198,17 @@ fd5_sampler_view_create(struct pipe_context *pctx, struct
pipe_resource *prsc,
{
struct fd5_pipe_sampler_view *so = CALLOC_STRUCT(fd5_pipe_sampler_view);
struct fd_resource *rsc = fd_resource(prsc);
+ enum pipe_format format = cso->format;
unsigned lvl, layers;
if (!so)
return NULL;
+ if (format == PIPE_FORMAT_X32_S8X24_UINT) {
+ rsc = rsc->stencil;
+ format = rsc->base.b.format;
+ }
+
so->base = *cso;
pipe_reference(NULL, &prsc->reference);
so->base.texture = prsc;
@@ -210,25 +216,38 @@ fd5_sampler_view_create(struct pipe_context *pctx, struct
pipe_resource *prsc,
so->base.context = pctx;
so->texconst0 =
- A5XX_TEX_CONST_0_FMT(fd5_pipe2tex(cso->format)) |
- fd5_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g,
+ A5XX_TEX_CONST_0_FMT(fd5_pipe2tex(format)) |
+ fd5_tex_swiz(format, cso->swizzle_r, cso->swizzle_g,
cso->swizzle_b, cso->swizzle_a);
- if (util_format_is_srgb(cso->format)) {
- if (use_astc_srgb_workaround(pctx, cso->format))
+ /* NOTE: since we sample z24s8 using 8888_UINT format, the swizzle
+ * we get isn't quite right. Use SWAP(XYZW) as a cheap and cheerful
+ * way to re-arrange things so stencil component is where the swiz
+ * expects.
+ *
+ * Note that gallium expects stencil sampler to return (s,s,s,s)
+ * which isn't quite true. To make that happen we'd have to massage
+ * the swizzle. But in practice only the .x component is used.
+ */
+ if (format == PIPE_FORMAT_X24S8_UINT) {
+ so->texconst0 |= A5XX_TEX_CONST_0_SWAP(XYZW);
+ }
+
+ if (util_format_is_srgb(format)) {
+ if (use_astc_srgb_workaround(pctx, format))
so->astc_srgb = true;
so->texconst0 |= A5XX_TEX_CONST_0_SRGB;
}
if (cso->target == PIPE_BUFFER) {
- unsigned elements = cso->u.buf.size /
util_format_get_blocksize(cso->format);
+ unsigned elements = cso->u.buf.size /
util_format_get_blocksize(format);
lvl = 0;
so->texconst1 =
A5XX_TEX_CONST_1_WIDTH(elements) |
A5XX_TEX_CONST_1_HEIGHT(1);
so->texconst2 =
-
A5XX_TEX_CONST_2_FETCHSIZE(fd5_pipe2fetchsize(cso->format)) |
+ A5XX_TEX_CONST_2_FETCHSIZE(fd5_pipe2fetchsize(format)) |
A5XX_TEX_CONST_2_PITCH(elements * rsc->cpp);
so->offset = cso->u.buf.offset;
} else {
@@ -243,10 +262,10 @@ fd5_sampler_view_create(struct pipe_context *pctx, struct
pipe_resource *prsc,
A5XX_TEX_CONST_1_WIDTH(u_minify(prsc->width0, lvl)) |
A5XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl));
so->texconst2 =
-
A5XX_TEX_CONST_2_FETCHSIZE(fd5_pipe2fetchsize(cso->format)) |
+ A5XX_TEX_CONST_2_FETCHSIZE(fd5_pipe2fetchsize(format)) |
A5XX_TEX_CONST_2_PITCH(
util_format_get_nblocksx(
- cso->format,
rsc->slices[lvl].pitch) * rsc->cpp);
+ format,
rsc->slices[lvl].pitch) * rsc->cpp);
so->offset = fd_resource_offset(rsc, lvl,
cso->u.tex.first_layer);
}
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