Module: Mesa
Branch: master
Commit: fc6c77e162df3405e6de9f5644788984b2f7aacc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc6c77e162df3405e6de9f5644788984b2f7aacc
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Date: Thu Dec 7 11:39:46 2017 +0100
radv: fix TC-compat HTILE with VK_FORMAT_D32_SFLOAT_S8_UINT on Vega
Copied from RadeonSI.
This fixes all CTS
dEQP-VK.renderpass.dedicated_allocation.formats.d32_sfloat_s8_uint.clear.*
And some other ones which use the same format.
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Reviewed-by: Dave Airlie <airl...@redhat.com>
---
src/amd/vulkan/radv_image.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 5c53e81637..efd17e4889 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -416,6 +416,12 @@ si_make_texture_descriptor(struct radv_device *device,
data_format = 0;
}
+ /* S8 with Z32 HTILE needs a special format. */
+ if (device->physical_device->rad_info.chip_class >= GFX9 &&
+ vk_format == VK_FORMAT_S8_UINT &&
+ image->tc_compatible_htile)
+ data_format = V_008F14_IMG_DATA_FORMAT_S8_32;
+
type = radv_tex_dim(image->type, view_type, image->info.array_size,
image->info.samples,
is_storage_image,
device->physical_device->rad_info.chip_class >= GFX9);
if (type == V_008F1C_SQ_RSRC_IMG_1D_ARRAY) {
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