Module: Mesa
Branch: master
Commit: 6e499572b9a7b33165b8438a85db37ae1ba0ce0e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e499572b9a7b33165b8438a85db37ae1ba0ce0e
Author: Neil Roberts <nrobe...@igalia.com>
Date: Wed Mar 21 20:34:39 2018 +0100
spirv: Add a 64-bit implementation of OpIsInf
The only change neccessary is to change the type of the constant used
to compare against.
This has been tested against the arb_gpu_shader_fp64/execution/
fs-isinf-dvec tests using the ARB_gl_spirv branch.
v2: Use nir_imm_floatN_t for the constant.
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
---
src/compiler/spirv/vtn_alu.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
index fc378495b8..71e743cdd1 100644
--- a/src/compiler/spirv/vtn_alu.c
+++ b/src/compiler/spirv/vtn_alu.c
@@ -564,10 +564,11 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
val->ssa->def = nir_fne(&b->nb, src[0], src[0]);
break;
- case SpvOpIsInf:
- val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]),
- nir_imm_float(&b->nb, INFINITY));
+ case SpvOpIsInf: {
+ nir_ssa_def *inf = nir_imm_floatN_t(&b->nb, INFINITY, src[0]->bit_size);
+ val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]), inf);
break;
+ }
case SpvOpFUnordEqual:
case SpvOpFUnordNotEqual:
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