Module: Mesa
Branch: master
Commit: f8ac11d69f1a05378896023577d6455764b5cdf2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8ac11d69f1a05378896023577d6455764b5cdf2
Author: Nanley Chery <nanley.g.ch...@intel.com>
Date: Tue Mar 27 15:08:53 2018 -0700
i965/blorp: Also skip the fast clear if the clear color differs
If the aux state is CLEAR and clear color value has changed, only the
surface state must be updated. The bit-pattern in the aux buffer is
exactly the same.
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
---
src/mesa/drivers/dri/i965/brw_blorp.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 04155b7d4c..9d57745cc5 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -1229,13 +1229,12 @@ do_single_blorp_clear(struct brw_context *brw, struct
gl_framebuffer *fb,
brw_meta_convert_fast_clear_color(brw, irb->mt,
&ctx->Color.ClearColor);
- bool same_clear_color =
- !intel_miptree_set_clear_color(brw, irb->mt, clear_color);
+ intel_miptree_set_clear_color(brw, irb->mt, clear_color);
- /* If the buffer is already in INTEL_FAST_CLEAR_STATE_CLEAR, the clear
+ /* If the buffer is already in ISL_AUX_STATE_CLEAR, the clear
* is redundant and can be skipped.
*/
- if (aux_state == ISL_AUX_STATE_CLEAR && same_clear_color)
+ if (aux_state == ISL_AUX_STATE_CLEAR)
return;
DBG("%s (fast) to mt %p level %d layers %d+%d\n", __FUNCTION__,
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