Module: Mesa
Branch: master
Commit: 7970fcff2540b7678cc07ed269ec7fb860a4d2de
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7970fcff2540b7678cc07ed269ec7fb860a4d2de
Author: Alok Hota <alok.h...@intel.com>
Date: Wed May 16 11:14:19 2018 -0500
swr/rast: fix VCVTPD2PS generation for AVX512
Reviewed-By: George Kyriazis <george.kyria...@intel.com>
---
.../swr/rasterizer/jitter/functionpasses/lower_x86.cpp | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git
a/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp
b/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp
index 3caea67e16..e0296f6255 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp
@@ -265,8 +265,16 @@ namespace SwrJit
// Assuming the intrinsics are consistent and place the src
operand and mask last in the argument list.
if (mTarget == AVX512)
{
- args.push_back(GetZeroVec(vecWidth, pElemTy));
- args.push_back(GetMask(vecWidth));
+ if (pFunc->getName().equals("meta.intrinsic.VCVTPD2PS")) {
+ args.push_back(GetZeroVec(W256,
pCallInst->getType()->getScalarType()));
+ args.push_back(GetMask(W256));
+ // for AVX512 VCVTPD2PS, we also have to add rounding
mode
+ args.push_back(B->C(_MM_FROUND_TO_NEAREST_INT |
+ _MM_FROUND_NO_EXC));
+ } else {
+ args.push_back(GetZeroVec(vecWidth, pElemTy));
+ args.push_back(GetMask(vecWidth));
+ }
}
return B->CALLA(pIntrin, args);
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