Module: Mesa Branch: master Commit: 417b9e5770436008a7f00cfaffe9ddf4c5a13502 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=417b9e5770436008a7f00cfaffe9ddf4c5a13502
Author: Jason Ekstrand <[email protected]> Date: Fri May 18 20:04:12 2018 -0700 intel/eu: Set EXECUTE_1 when setting the rounding mode in cr0 Fixes: d6cd14f2131a5b "i965/fs: Define new shader opcode to..." Reviewed-by: Jose Maria Casanova Crespo <[email protected]> --- src/intel/compiler/brw_eu_emit.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index ee5a048bca..6d81c636f2 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -3713,6 +3713,7 @@ brw_rounding_mode(struct brw_codegen *p, if (bits != BRW_CR0_RND_MODE_MASK) { brw_inst *inst = brw_AND(p, brw_cr0_reg(0), brw_cr0_reg(0), brw_imm_ud(~BRW_CR0_RND_MODE_MASK)); + brw_inst_set_exec_size(p->devinfo, inst, BRW_EXECUTE_1); /* From the Skylake PRM, Volume 7, page 760: * "Implementation Restriction on Register Access: When the control @@ -3727,6 +3728,7 @@ brw_rounding_mode(struct brw_codegen *p, if (bits) { brw_inst *inst = brw_OR(p, brw_cr0_reg(0), brw_cr0_reg(0), brw_imm_ud(bits)); + brw_inst_set_exec_size(p->devinfo, inst, BRW_EXECUTE_1); brw_inst_set_thread_control(p->devinfo, inst, BRW_THREAD_SWITCH); } } _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
