Module: Mesa Branch: staging/18.1 Commit: c718d485008a2f90fd881eddd0d88cf3fa44cb7e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c718d485008a2f90fd881eddd0d88cf3fa44cb7e
Author: Nanley Chery <[email protected]> Date: Fri Aug 17 15:03:14 2018 -0700 i965/miptree: Use miptree_map in map_blit functions This struct contains all the data of interest. can_blit_slice() will use it in the next patch to calculate the correct pitch. Suggested-by: Chris Wilson <[email protected]> Cc: <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 030b6efcfdeff5cc079d5b6d8e682e180570ce71) --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 1ddb945b08..084fcad348 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -3574,7 +3574,7 @@ intel_miptree_release_map(struct intel_mipmap_tree *mt, static bool can_blit_slice(struct intel_mipmap_tree *mt, - unsigned int level, unsigned int slice) + const struct intel_miptree_map *map) { /* See intel_miptree_blit() for details on the 32k pitch limit. */ if (intel_miptree_blt_pitch(mt) >= 32768) @@ -3586,9 +3586,7 @@ can_blit_slice(struct intel_mipmap_tree *mt, static bool use_intel_mipree_map_blit(struct brw_context *brw, struct intel_mipmap_tree *mt, - GLbitfield mode, - unsigned int level, - unsigned int slice) + const struct intel_miptree_map *map) { const struct gen_device_info *devinfo = &brw->screen->devinfo; @@ -3596,19 +3594,19 @@ use_intel_mipree_map_blit(struct brw_context *brw, /* It's probably not worth swapping to the blit ring because of * all the overhead involved. */ - !(mode & GL_MAP_WRITE_BIT) && + !(map->mode & GL_MAP_WRITE_BIT) && !mt->compressed && (mt->surf.tiling == ISL_TILING_X || /* Prior to Sandybridge, the blitter can't handle Y tiling */ (devinfo->gen >= 6 && mt->surf.tiling == ISL_TILING_Y0) || /* Fast copy blit on skl+ supports all tiling formats. */ devinfo->gen >= 9) && - can_blit_slice(mt, level, slice)) + can_blit_slice(mt, map)) return true; if (mt->surf.tiling != ISL_TILING_LINEAR && mt->bo->size >= brw->max_gtt_map_object_size) { - assert(can_blit_slice(mt, level, slice)); + assert(can_blit_slice(mt, map)); return true; } @@ -3660,7 +3658,7 @@ intel_miptree_map(struct brw_context *brw, intel_miptree_map_etc(brw, mt, map, level, slice); } else if (mt->stencil_mt && !(mode & BRW_MAP_DIRECT_BIT)) { intel_miptree_map_depthstencil(brw, mt, map, level, slice); - } else if (use_intel_mipree_map_blit(brw, mt, mode, level, slice)) { + } else if (use_intel_mipree_map_blit(brw, mt, map)) { intel_miptree_map_blit(brw, mt, map, level, slice); #if defined(USE_SSE41) } else if (!(mode & GL_MAP_WRITE_BIT) && _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
