Module: Mesa Branch: master Commit: 323958908e5f98d7d9c7cee0797ad365adb4e19e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=323958908e5f98d7d9c7cee0797ad365adb4e19e
Author: Rob Clark <[email protected]> Date: Wed Feb 20 17:33:23 2019 -0500 freedreno/a6xx: samplerBuffer fixes Use the 'UNK31' bit (which should probably be called 'BUFFER') for samplerBuffer case, which increases the size of supported buffer texture beyond 2^15 elements. Also need to fix the 2nd coord injected to handle the tex instructions that take integer coords. Fixes dEQP-GLES31.functional.texture.texture_buffer.render.as_fragment_texture.buffer_size_131071 and similar Signed-off-by: Rob Clark <[email protected]> --- src/freedreno/ir3/ir3_compiler_nir.c | 13 +++++++++++-- src/gallium/drivers/freedreno/a6xx/fd6_texture.c | 8 ++++---- src/gallium/drivers/freedreno/freedreno_screen.c | 4 ++-- 3 files changed, 17 insertions(+), 8 deletions(-) diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 8599d910ad3..6fb899f611c 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -1573,9 +1573,18 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex) if (coords == 1) { /* hw doesn't do 1d, so we treat it as 2d with * height of 1, and patch up the y coord. - * TODO: y coord should be (int)0 in some cases.. */ - src0[nsrc0++] = create_immed(b, fui(0.5)); + switch (opc) { + case OPC_ISAM: + case OPC_ISAML: + case OPC_ISAMM: + /* These instructions expect integer coord: */ + src0[nsrc0++] = create_immed(b, 0); + break; + default: + src0[nsrc0++] = create_immed(b, fui(0.5)); + break; + } } if (tex->is_shadow && tex->op != nir_texop_lod) diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_texture.c b/src/gallium/drivers/freedreno/a6xx/fd6_texture.c index 171a016d985..0d6bec72b14 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_texture.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_texture.c @@ -260,11 +260,11 @@ fd6_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc, lvl = 0; so->texconst1 = - A6XX_TEX_CONST_1_WIDTH(elements) | - A6XX_TEX_CONST_1_HEIGHT(1); + A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) | + A6XX_TEX_CONST_1_HEIGHT(elements >> 15); so->texconst2 = - A6XX_TEX_CONST_2_FETCHSIZE(fd6_pipe2fetchsize(format)) | - A6XX_TEX_CONST_2_PITCH(elements * rsc->cpp); + A6XX_TEX_CONST_2_UNK4 | + A6XX_TEX_CONST_2_UNK31; so->offset = cso->u.buf.offset; } else { unsigned miplevels; diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index c5a96a87dc0..d9918f45c37 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -243,7 +243,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) if (is_a3xx(screen)) return 16; if (is_a4xx(screen)) return 32; if (is_a5xx(screen)) return 32; - if (is_a6xx(screen)) return 32; + if (is_a6xx(screen)) return 64; return 0; case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: /* We could possibly emulate more by pretending 2d/rect textures and @@ -252,7 +252,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) if (is_a3xx(screen)) return 8192; if (is_a4xx(screen)) return 16384; if (is_a5xx(screen)) return 16384; - if (is_a6xx(screen)) return 16384; + if (is_a6xx(screen)) return 1 << 27; return 0; case PIPE_CAP_TEXTURE_FLOAT_LINEAR: _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
