Module: Mesa Branch: master Commit: 1259f6d80215152e647b5c32db4fad32e420d495 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1259f6d80215152e647b5c32db4fad32e420d495
Author: Ian Romanick <[email protected]> Date: Mon Jun 3 15:22:15 2019 -0700 nir: intel/vec4: Add flag to disable some algebraic optimizations A couple patches later in this series use the flag to avoid a few thousand shader-db regresions on all vec4 platforms. I'm not particularly enamored with the name of this flag. However, I suspect the Intel vec4 backend is the only backend that will benefit from it. Specifically, the cases where this helps are all cases where we want to prevent nir_opt_algebraic from rearranging instructions to create 3-source instructions, such as ffma and flrp, with additional immediate value or uniform sources. The earlier commit "intel/vec4: Try to emit a single load for multiple 3-src instruction operands" solves most of the problems caused by additional immediate values, but the restrictions on register strides that cause problems for uniforms and shader inputs persist. Reviewed-by: Matt Turner <[email protected]> --- src/compiler/nir/nir.h | 10 ++++++++++ src/intel/compiler/brw_compiler.c | 1 + 2 files changed, 11 insertions(+) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 4fa50940e17..bc7ae1cc03e 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -2630,6 +2630,16 @@ typedef struct nir_shader_compiler_options { /* Lowers when rotate instruction is not supported */ bool lower_rotate; + /** + * Is this the Intel vec4 backend? + * + * Used to inhibit algebraic optimizations that are known to be harmful on + * the Intel vec4 backend. This is generally applicable to any + * optimization that might cause more immediate values to be used in + * 3-source (e.g., ffma and flrp) instructions. + */ + bool intel_vec4; + unsigned max_unroll_iterations; nir_lower_int64_options lower_int64_options; diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c index eb1f3808fbc..3a80f807b87 100644 --- a/src/intel/compiler/brw_compiler.c +++ b/src/intel/compiler/brw_compiler.c @@ -82,6 +82,7 @@ static const struct nir_shader_compiler_options vector_nir_options = { .lower_unpack_unorm_2x16 = true, .lower_extract_byte = true, .lower_extract_word = true, + .intel_vec4 = true, .max_unroll_iterations = 32, }; _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
