Module: Mesa Branch: master Commit: 7735f314b7492ba4f4dcd5d4c60b304e1d99df68 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7735f314b7492ba4f4dcd5d4c60b304e1d99df68
Author: Samuel Pitoiset <[email protected]> Date: Thu Dec 19 14:12:21 2019 +0100 radv: ignore pMultisampleState if rasterization is disabled Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3167> --- src/amd/vulkan/radv_pipeline.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 63aed7d5042..c1058551e64 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -91,6 +91,14 @@ struct radv_tessellation_state { uint32_t tf_param; }; +static const VkPipelineMultisampleStateCreateInfo * +radv_pipeline_get_multisample_state(const VkGraphicsPipelineCreateInfo *pCreateInfo) +{ + if (!pCreateInfo->pRasterizationState->rasterizerDiscardEnable) + return pCreateInfo->pMultisampleState; + return NULL; +} + bool radv_pipeline_has_ngg(const struct radv_pipeline *pipeline) { struct radv_shader_variant *variant = NULL; @@ -699,7 +707,7 @@ radv_pipeline_init_blend_state(struct radv_pipeline *pipeline, const struct radv_graphics_pipeline_create_info *extra) { const VkPipelineColorBlendStateCreateInfo *vkblend = pCreateInfo->pColorBlendState; - const VkPipelineMultisampleStateCreateInfo *vkms = pCreateInfo->pMultisampleState; + const VkPipelineMultisampleStateCreateInfo *vkms = radv_pipeline_get_multisample_state(pCreateInfo); struct radv_blend_state blend = {0}; unsigned mode = V_028808_CB_NORMAL; int i; @@ -1092,7 +1100,7 @@ radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline, struct radv_blend_state *blend, const VkGraphicsPipelineCreateInfo *pCreateInfo) { - const VkPipelineMultisampleStateCreateInfo *vkms = pCreateInfo->pMultisampleState; + const VkPipelineMultisampleStateCreateInfo *vkms = radv_pipeline_get_multisample_state(pCreateInfo); struct radv_multisample_state *ms = &pipeline->graphics.ms; unsigned num_tile_pipes = pipeline->device->physical_device->rad_info.num_tile_pipes; bool out_of_order_rast = false; @@ -2268,11 +2276,11 @@ radv_generate_graphics_pipeline_key(struct radv_pipeline *pipeline, if (pCreateInfo->pTessellationState) key.tess_input_vertices = pCreateInfo->pTessellationState->patchControlPoints; - - if (pCreateInfo->pMultisampleState && - pCreateInfo->pMultisampleState->rasterizationSamples > 1) { - uint32_t num_samples = pCreateInfo->pMultisampleState->rasterizationSamples; - uint32_t ps_iter_samples = radv_pipeline_get_ps_iter_samples(pCreateInfo->pMultisampleState); + const VkPipelineMultisampleStateCreateInfo *vkms = + radv_pipeline_get_multisample_state(pCreateInfo); + if (vkms && vkms->rasterizationSamples > 1) { + uint32_t num_samples = vkms->rasterizationSamples; + uint32_t ps_iter_samples = radv_pipeline_get_ps_iter_samples(vkms); key.num_samples = num_samples; key.log2_ps_iter_samples = util_logbase2(ps_iter_samples); } _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
