URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc5724faf40df9aec6c8e2e52f4017db35d21330
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 08:23:43 2020 -0500
pan/bi: Add bi_print_shader
Woot! That's the last of it! IR printing is now complete*
*until the IR gets updated when new shiny things are added.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c152d4c8352aca678386eaf75da83ae95e1bd7b5
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 08:22:07 2020 -0500
pan/bi: Add bi_print_block
Almost there...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c316d1553bc27e9f64a14fcce147de96bea430e0
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 08:10:02 2020 -0500
pan/bi: Add bi_print_clause
Again for post-sched purposes.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=919cdf15b3a88cf745e3aed1a52ea45a44846b35
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 07:57:49 2020 -0500
pan/bi: Add bi_print_bundle for printing bi_bundle
Post-schedule, nops are significnat here.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bde54cb6d319fd9516507c1040d9e5fe8e7b81f2
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Wed Mar 4 09:21:50 2020 -0500
pan/bi: Add bi_instruction printing
So we can debug the IR in memory before code emit has happened. We'd
like to have a complete dump of the IR -- neglecting this with Midgard
was one of those mistakes I've regretted so let's get this right for the
first time around.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aef0f00cbc976a29e5b66da4b2abbd2bcd9c0d52
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Wed Mar 4 09:21:25 2020 -0500
pan/bi: Move bi_interp_mode_name to bi_print
Instead of open-coding it in the middle of the disassembler.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d16a8109c88c869ce17e6b680e2922bb983caa6
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Wed Mar 4 09:19:06 2020 -0500
pan/bi: Add BIR manipulation routines to bir.c
New file.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5f7a3ba872c90afc251035f24f7fc7faf6498fe3
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 15:39:04 2020 -0500
pan/bi: Move some print routines out of the disasm
These are generally useful for debug of the compiler IR even prior to
code emit; let's share these.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ec671801a8decdd5c733f2fec53726d34666a0b
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 14:32:28 2020 -0500
pan/bi: Add IR iteration macros
Copypaste from Midgard, for the most part.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b26cb194cc433a9910247051024bd6468d9b05c
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 14:27:05 2020 -0500
pan/bi: Add quirks system
Modeled after the Midgard system. Already we know of two
compiler-visible differences between G52 and G71, so let's keep track so
we can eventually port the compiler to other Bifrost systems.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=07228a6895b4b57efaf55e7e6b180e308ceab879
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 13:55:33 2020 -0500
pan/bi: Add high-latency property for classes
This is required to know how to schedule legally, and also influences
some issues relating to RA.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=546c301ff6d12cad678b6feb1c83cf75eb36def1
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 07:46:00 2020 -0500
pan/bi: Add CSEL condition
Along with src_types, this is enough to represent CSEL.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=47451bb9f1c610dc62629d829c378034df83bf57
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 13:48:13 2020 -0500
pan/bi: Add bi_branch data
For BI_BRANCH, of course. Meshes well with the cfg.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=73c91f14c9f94c5b2ffbd1aaaf7d7c60cb7bc3c9
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 13:47:49 2020 -0500
pan/bi: Extract bifrost_branch structure
It's in the disassembler as bitfields, let's extract to a proper
structure so we can see what's there.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2afddc4433f49eb44654a63b1406181ee3dc25d8
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 13:47:13 2020 -0500
pan/bi: Add pred/successors to build CFG
We'll want this for analysis passes or something, probably.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3370bd5a50d8a490a8b57a92853ff203f07711c
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 13:01:41 2020 -0500
pan/bi: Add constants to bi_clause
Scheduling will have to pay attention to this.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb3cd8aa56e76afa988429f0373642c53c1b4f92
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 08:57:03 2020 -0500
pan/bi: Add EXTRACT, MAKE_VEC synthetic ops
These allow translating between the vector I/O and scalar ALUs,
facilitated by an RA dance to ensured contiguous registers are used.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8929fe0c84299cedd1ec86f49b795595ff3f90f8
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 08:37:15 2020 -0500
pan/bi: Add source type for conversions
We should now be able to unambiguously represent conversions.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5896db957876c4dc1cd7ecb4e6eef44690b10530
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 08:35:51 2020 -0500
pan/bi: Add swizzles
Requires a new field on bifrost_instruction, as well as a new class
property and a new class for the dedicated swizzle ops.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c70a198f24cbf5127d48673d96ad8f8153dbe729
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 08:16:50 2020 -0500
pan/bi: Clarify special op scheduling
They're encoded on ADD but eat the full cycle.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fba1d12742db36536b6010807a59884abfb79973
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 08:09:18 2020 -0500
pan/bi: Add clause header fields to bi_clause
These will be filled out during scheduling (and possibly RA), to be used
when emitting code.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=44ebc275fe83c007cb7c881cd5016dc1f6ec368b
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 07:58:05 2020 -0500
pan/bi: Add class-specific ops
For disambiguating things like min and max within the MINMAX class.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5bdd894443507964cad63b40c0c598d115c7333
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 07:47:29 2020 -0500
pan/bi: Add constant field to bi_instruction
Now that we can index it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a2c1265dd34a97cfb1abd11fa44d8cf93187c99e
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Tue Mar 3 07:45:33 2020 -0500
pan/bi: Add special indices
For fixed registers, uniforms, and constants, which bypass the usual SSA
mechanism to map well to the ISA.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c42002d26f4ff59e188891e5ff68d8387d1959d3
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 22:03:05 2020 -0500
pan/bi: Add dest_type field to bifrost_instruction
A number of opcodes within a class are disambiguated by type/size, and
whether modifiers make sense or not depends on whether the instruction
acts like a float.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a35854c5eee542c47e8be3c6d85a19d8fad99acc
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 22:00:07 2020 -0500
pan/bi: Add bi_clause, bi_bundle abstractions
These will be used during and after scheduling.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=99f3c1f34c0526a9d0a5177d71d0c4a6042c3409
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 21:53:13 2020 -0500
pan/bi: Add PAN_SCHED_* flags
Class (mostly) determines scheduling options.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9643b9dd5b683d5e18c085cd49bdfe49143b861b
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 21:48:51 2020 -0500
pan/bi: Add bi_load_vary structure
For ld_vary in the IR.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6a7987aba10aaf05fbe678b3f3ccf5882b687aea
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 21:45:47 2020 -0500
pan/bi: Pull out bifrost_load_var
We're not using this structure yet but we want everything in the ISA
ready for us.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa2f12de562e38b7b0e154c7d467aa1d85279a32
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 21:19:16 2020 -0500
pan/bi: Add bi_load structure
Fills out the class for LD_ATTR, LD_VAR_ADDR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b93aec6df19d6daf3d6c28aad755af1cec52aab7
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 20:53:47 2020 -0500
pan/bi: Add bifrost_minmax_mode field
We'll open up a union for class specific data, since this is interesting
only to BI_MINMAX. (And even then...)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d69bf8db6217b7309ea7a7aec8139c8151b39f3c
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 20:52:36 2020 -0500
pan/bi: Add a bifrost_roundmode field
And a class property signaling it's okay to use.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bbf41ffb00d8d78db1cf43403ab7f6af5a2f9ec3
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 20:51:03 2020 -0500
pan/bi: Factor out enum bifrost_minmax_mode
We'll want it from the compiler-side.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=34165c7ec0fb3a0a07f3a1ede833b8bbf336e44a
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 20:46:37 2020 -0500
pan/bi: Add BI_GENERIC property
I don't want to have 20 class-specific structures floating around. So
let's derive them all from a common generic ALU type.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=29acd7bd8e50ac83aeeb68471f516ed6525aae99
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 20:40:52 2020 -0500
pan/bi: Add modifiers to bi_instruction
Now that we can check if we support them via the class.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ac62121e037f3d9fbd3612d936ff736835e0b1f
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 20:38:26 2020 -0500
pan/bi: Add class properties
We need to keep track of what specific classes support. For now just
track floating point modifiers.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=230be61f201d07ac95e32a82e688a05eb4093fcc
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 20:24:03 2020 -0500
pan/bi: Add src/dest fields to bifrost_instruction
...along with some helpers to generate indices. The indexing scheme is
mostly a copypaste from Midgard, except we specifically reserve 0 as the
sentinel (midgard uses ~0 for this which has always been a pain point).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7dc2a7b9beeb3fe9af00033d972f89bf436bb68
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 20:06:34 2020 -0500
pan/bi: Add the control flow graph
We're starting to build up the IR data structures in preparation to get
everything piped through.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eceaea43e37e30e9bf7e5059d17cec445e59fbd3
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 19:47:11 2020 -0500
pan/bi: Stub out new compiler
Just enough to pipe in the NIR shader.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d3a4e31138f1663b0c37b91d7263bba6025fa73
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 19:30:11 2020 -0500
pan/bi: Gut old compiler
We're making some pretty dramatic design pivots so this early on it'll
be easier to start from scratch, I think.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb15525ab798aea74b02a7160c0fa4b9ec6212be
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Mon Mar 2 21:32:31 2020 -0500
panfrost: Add note about preloaded varyings
There's a magic bit in preload_regs which controls this. It doesn't
appear to be supported on G71 but it is on G52. I'd guess G72 supports
it too but I don't have a way to check this.
Needless to say, we'll need a quirks database for this.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
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