URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=53b2b224dc2de982c37915a0ad218e33365ff75e
Author: Dylan Baker <dy...@pnwbakers.com>
Date: Thu Mar 5 13:33:32 2020 -0800
Bump version for 20.0.1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc67340ea551e3c7361cf90f7edb48c57dba424f
Author: Dylan Baker <dy...@pnwbakers.com>
Date: Thu Mar 5 13:33:09 2020 -0800
docs: add relnotes for 20.0.1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1defcf02b49975a92e20997e5c5bd41e7794677f
Author: Andrii Simiklit <andrii.simik...@globallogic.com>
Date: Wed Jan 15 12:34:38 2020 +0200
Revert "glx: convert glx_config_create_list to one big calloc"
This reverts commit 35fc7bdf0e6ad6547e39099e7060a3d89539b56d.
Unfortunately mentioned commit introduced a memory leak because
`driwindowsMapConfigs` and `createDriMode` functions allocate
small memory portions for each element:
21,576 (232 direct, 21,344 indirect) bytes in 1 blocks are definitely lost
in loss record 1,411 of 1,414
at 0x483A7F3: malloc (in
/usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x5D4AA09: createDriMode (dri_common.c:291)
by 0x5D4ABF5: driConvertConfigs (dri_common.c:310)
by 0x5D58414: dri3_create_screen (dri3_glx.c:945)
by 0x5D39829: AllocAndFetchScreenConfigs (glxext.c:815)
by 0x5D39C57: __glXInitialize (glxext.c:941)
by 0x5D3290A: GetGLXPrivScreenConfig (glxcmds.c:174)
by 0x5D34F38: glXQueryExtensionsString (glxcmds.c:1307)
by 0x4F83038: glXQueryExtensionsString (in
/usr/local/lib/libGL.so.1.7.0)
by 0x4F2EA6B: ??? (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
by 0x4F2A0D7: waffle_display_connect (in
/usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
by 0x498F42A: wfl_checked_display_connect (piglit-util-waffle.h:74)
There is one more thing which disallow us to easily fix it are different
element sizes
for instance: `glx_config_create_list` allocates memory just for
`glx_config`,
`driwindowsMapConfigs` for `driwindows_config` and
`createDriMode` for `__GLXDRIconfigPrivate`.
Yes it is possible but size of such fix
will be more big and complex than original one.
So it make sense only if the malloc overhead
really is a big problem there.
Acked-by: Eric Engestrom <e...@engestrom.ch>
Signed-off-by: Andrii Simiklit <andrii.simik...@globallogic.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3406>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3406>
(cherry picked from commit 311c82e1923f63070b198881d90c1098f4ff7a08)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d203789a93ae69d4e438b28171686871cc07c7e
Author: Rafael Antognolli <rafael.antogno...@intel.com>
Date: Tue Mar 3 08:07:32 2020 -0800
intel/gen12+: Disable mid thread preemption.
Fixes a GPU hang in Car Chase.
Cc: mesa-sta...@lists.freedesktop.org
v2: Add comment explaining why (Jason).
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
(cherry picked from commit 5f13996262a6d72ca5b5c235647d5257ae961b66)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5620cd4bcaf5d8f0a90d9e087b35e0632ec44c1c
Author: Rhys Perry <pendingchao...@gmail.com>
Date: Fri Feb 21 12:00:38 2020 +0000
aco: fix carry-out size for wave32 v_add_co_u32_e64
Signed-off-by: Rhys Perry <pendingchao...@gmail.com>
Reviewed-By: Timur Kristóf <timur.kris...@gmail.com>
Fixes: e0bcefc3a0a ('aco/wave32: Use lane mask regclass for exec/vcc.')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
(cherry picked from commit 215df21dea14358cccc1c9d84a186221cf834c7d)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe1ba4a04176ec588b26fcc1d56e2433ab16d5f3
Author: Rhys Perry <pendingchao...@gmail.com>
Date: Tue Feb 11 16:52:20 2020 +0000
aco: keep track of which events are used in a barrier
And properly handle unordered events so that they always wait for 0.
Signed-off-by: Rhys Perry <pendingchao...@gmail.com>
Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann <dan...@schuermann.dev>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3774>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3774>
(cherry picked from commit 9fea90ad5170dd64376d22a14ac88c392813c96c)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d80837467488f6bef2e53b3d26a8d6fd4e46ea37
Author: Paulo Zanoni <paulo.r.zan...@intel.com>
Date: Fri Jan 24 14:41:25 2020 -0800
intel/device: bdw_gt1 actually has 6 eus per subslice
Found by inspection, I'm not aware of any bugs caused by this typo.
According to Lionel, it seems we only use this to generate masks
of available EUs for perfromance queries, and it's only used when we
can't query the fused parts of the GPU through DRM_IOCTL_I915_QUERY.
So this patch should help for the corner case where the Kernel is too
old to support the query ioctl.
v2: improve commit message, cc stable (Lionel).
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
(cherry picked from commit aa78801f0a6cfeaf3d16b4333239c0b862f73c10)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7b8a304bda285af78e292f2b689ebfbd664319f
Author: Paulo Zanoni <paulo.r.zan...@intel.com>
Date: Fri Feb 28 15:16:07 2020 -0800
intel: fix the gen 12 compute shader scratch IDs
This is the same idea as "intel: fix the gen 11 compute shader scratch
IDs".
The number of EUs on TGL is not the same as ICL, but the
MEDIA_VFE_STATE restrictions stay the same, so adapt the code to it.
Also, consider the base configuration instead of what we read from the
Kernel.
According to Mark, this fixes the following piglit tests on TGL:
piglit.spec.arb_compute_shader.execution.shared-atomicmax-uint.tglm64
piglit.spec.arb_compute_shader.execution.shared-atomicmax-int.tglm64
piglit.spec.intel_shader_atomic_float_minmax.execution.shared-atomicmax-float.tglm64
v2: s/ICL+/Gen11+/ (Jason).
Cc: mesa-sta...@lists.freedesktop.org
Tested-by: Mark Janes <mark.a.ja...@intel.com>
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
(cherry picked from commit 9e5ce30da7fa3f1cc3badfd348e5f8fda1bbacb2)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd4df57ad9e04783e4ad2362b2fd98be6e762e8b
Author: Paulo Zanoni <paulo.r.zan...@intel.com>
Date: Fri Jan 31 15:51:41 2020 -0800
intel: fix the gen 11 compute shader scratch IDs
Scratch space allocation is based on the number of threads in the base
configuration, and we only have one base configuration for ICL, with 8
subslices.
This fixes an issue with Aztec on Vulkan in a machine with a
configuration that's not the base. The issue looks like a regression
from b9e93db20896, but it seems things are broken since forever, just
not easily reproducible.
v2: Reimplement it using the subslices variable. Don't touch TGL.
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
(cherry picked from commit 1efe139cad150072985db02227be947aec532e2b)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=131136ab99c434a397477bc78da5a3835e8ca3cc
Author: Dylan Baker <dy...@pnwbakers.com>
Date: Wed Mar 4 08:27:31 2020 -0800
.pick_status.json: Update to 0ac731b1ff96de46998948aa06081efa5140d50e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=54574288a10b751f7c95a3ab571ed90166ae4282
Author: Tapani Pälli <tapani.pa...@intel.com>
Date: Thu Feb 27 10:33:33 2020 +0200
mesa/st: fix formats required for EXT_texture_norm16
Earlier commit did not take in to account that lists required for
rendering and texturing are parsed separately. This commit simply
removes formats added to the other list.
Fixes: de4eb9a3bb9 ("mesa/st: toggle EXT_texture_norm16 based on format
support")
Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
Reviewed-by: Eric Anholt <e...@anholt.net>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3961>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3961>
(cherry picked from commit fbd61b3fb66bcc3eb0f65da2c869046c24c35dc8)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb4a39ba2f42d58449df6616b98b4c8df46b20a4
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date: Thu Oct 24 11:55:23 2019 -0700
intel/compiler: Restrict cs_threads to 64
Our current GPGPU_WALKER code only supports up to 64 threads.
On HSW we could use up to 70 and TGL up to 112, but only if the walker
is adjusted so the width does not exceed 64. Work to support this is
in progress.
Previous to this change, we might try to downgrade to SIMD8 if the
SIMD16 shader spilled. Since HSW and TGL have the max number of
threads above 64, we would then try to emit an invalid GPGPU walker
command.
Fixes: 932045061b5 ("i965/cs: Emit compute shader code and upload programs")
Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Paulo Zanoni <paulo.r.zan...@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zan...@intel.com>
(cherry picked from commit cf12faef614ab7cd9996410f1d161558a3853936)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0a1bc1c217f3ec5b50c0db54832c56c189953ee
Author: Dylan Baker <dy...@pnwbakers.com>
Date: Mon Mar 2 11:28:45 2020 -0800
.pick_status.json: Update to 3503cb4c28e01b34f3a25546c058150709c22348
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f9a26ac25a28ab5dc57fc4c3a96e6beaa208d27
Author: Marek Olšák <marek.ol...@amd.com>
Date: Thu Feb 13 22:56:54 2020 -0500
mesa: fix incorrect prim.begin/end for glMultiDrawElements
This has no effect on Gallium, but it affects tnl.
Cc: 19.3 20.0 <mesa-sta...@lists.freedesktop.org>
Reviewed-by: Mathias Fröhlich <mathias.froehl...@web.de>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
(cherry picked from commit 1a61a5b1d4693631a1b6fb7e83c877792dfbf33d)
Conflicts Resolved by Dylan Baker
Conflicts:
src/mesa/main/draw.c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8334c60cba686a721959b6c970d2f357f8166391
Author: Jonathan Marek <jonat...@marek.ca>
Date: Thu Feb 27 10:22:02 2020 -0500
turnip: fix srgb MRT
Register packing macros makes this only set the first bit. Set to whole
dword to fix srgb for color attachments >0.
Fixes: 59f29fc8 ("turnip: Convert the rest of tu_cmd_buffer.c over to the
new pack macros.")
Signed-off-by: Jonathan Marek <jonat...@marek.ca>
Reviewed-by: Eric Anholt <e...@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
(cherry picked from commit 6420406f197cc4f1170c340e839701aeb253fdf0)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a14b7adabd370acb7aed43ba66e0ddabd3cf8399
Author: Eric Anholt <e...@anholt.net>
Date: Tue Feb 4 15:12:18 2020 -0800
aco: Fix signed-vs-unsigned warning.
The previous instance of this comparision was 1u to avoid the warning, fix
this one too.
Fixes: dba71de5c636 ("aco: only create parallelcopy to restore exec at loop
exit if needed")
Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3607>
(cherry picked from commit b9773631d3e79e2310ed0eb274b4dd9426205066)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9fc39b9c670dfaee7a6665fb80e0a9c0012eef45
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Date: Wed Feb 26 15:12:55 2020 +0100
ac/llvm: flush denorms for nir_op_fmed3 on GFX8 and older gens
The hardware doesn't flush denorms, exactly like fmin/fmax, so
we have to do it manually. This doesn't fix anything known.
Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
(cherry picked from commit 9e5d2a73c5fc12841b62758a035b2bdb191b3f86)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=710388f0067d978b932bf647a398221c242cf6ad
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Date: Wed Feb 26 15:09:40 2020 +0100
ac/llvm: fix 16-bit fmed3 on GFX8 and older gens
16-bit med3 is only supported on GFX9+.
Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f16.*.
Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
(cherry picked from commit 30ac733680c3dfbfd1300c5498dd1b0c0a680905)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2f6f63f7bf81a88cc4cbb36b1e0b9de25c17b5a
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Date: Wed Feb 26 15:04:38 2020 +0100
ac/llvm: fix 64-bit fmed3
Lower 64-bit fmed3 because LLVM doesn't expose an intrinsic.
Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f64.*.
Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
(cherry picked from commit 50b8c2527464dbe18a01ab6412de4465cebf2225)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=69edb32eaa53cbce7ca15fcbbfb453be968e4d8a
Author: Mathias Fröhlich <mathias.froehl...@web.de>
Date: Wed Feb 26 07:49:27 2020 +0100
mesa: Flush vertices before changing the OpenGL state.
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
CC: <mesa-sta...@lists.freedesktop.org>
Signed-off-by: Mathias Fröhlich <mathias.froehl...@web.de>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
(cherry picked from commit 636656bcd7801c703ebcf9bd4c65197e4e6cbee8)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1ec137ec991ffee21c1879638ef8802d6d6a873
Author: Dave Airlie <airl...@redhat.com>
Date: Wed Feb 26 12:13:13 2020 +1000
gallivm/nir: handle mod 0 better.
I haven't seen this crash but TGSI does it so best align with
it to avoid future issues.
Fixes: 44a6b0107b3J (gallivm: add nir->llvm translation (v2))
Reviewed-by: Roland Scheidegger <srol...@vmware.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
(cherry picked from commit 2b155b1086121ec1d6bcd3598a835c68617d9aca)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=981b2b6241a6b45c88d72f614d4ac66bc45dbf76
Author: Dave Airlie <airl...@redhat.com>
Date: Wed Feb 26 12:10:54 2020 +1000
gallivm/nir: fix integer divide SIGFPE
Blender was crashing with a SIGFPE even though the divide by 0
logic was kicking in. I'm not sure why TGSI doesn't get into this state.
The problem was is the numerator was INT_MIN we'd replace the div by
0 with a divide by -1, which is an exception for INT_MIN as INT_MIN/-1
== INT_MAX + 1 (too large for 32-bits). Instead for integer divides
just replace the mask values with 0x7fffffff. Also fix up the
result handling so it aligns with TGSI usage. (gives 0)
Fixes: c717ac1247c3 ("gallivm/nir: wrap idiv to avoid divide by 0 (v2)")
Reviewed-by: Roland Scheidegger <srol...@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
(cherry picked from commit 5370c685da4790834671e88bedbb0f15610e9bef)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb0f6e3ab81c37a465fad85acd520d1bfe942f22
Author: Dave Airlie <airl...@redhat.com>
Date: Wed Feb 26 07:03:33 2020 +1000
gallivm/tgsi: fix stream id regression
This broke TGSI GS shaders with llvmpipe, it wasn't looking at the
right immediates and it should be cast to an integer type.
Fixes: 163d5fde0669 (gallium/swr: Enable GL_ARB_gpu_shader5: multiple
streams)
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkow...@intel.com>
Acked-by: Jan Zielinski <jan.zielin...@intel.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
(cherry picked from commit 954cf8e86b6e0d52c04098604d2daa4305bf6f70)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb589b48eb71f41a7f4a0cc4ed900dced9ea3f20
Author: Marek Olšák <marek.ol...@amd.com>
Date: Wed Feb 19 21:43:56 2020 -0500
mesa: call FLUSH_VERTICES before updating CoordReplace
Reviewed-by: Mathias Fröhlich <mathias.froehl...@web.de>
Cc: 20.0 <mesa-sta...@lists.freedesktop.org>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
(cherry picked from commit 4449611ffbb0087a6d2407fb0d25496806df157b)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3aafc6ab8fa8421b17302478105e807a1e1b9d3c
Author: Rafael Antognolli <rafael.antogno...@intel.com>
Date: Thu Feb 20 11:02:52 2020 -0800
iris: Apply the flushes when switching pipelines.
Even though the workaround description says:
"all the listed commands are non-pipelined and hence flush caused due
to pipeline mode change must not cause performance issues..."
My understanding is that we still need to have the flushes. Also, the
flushes are required not only to stall the pipeline, but also to clear
caches, so I don't think they can simply be discarded.
Additionally, while doing some testing that increased the number of
surface STATE_BASE_ADDRESS emitted, I got a lot more GPU hangs. Adding
these flushes fixes those hangs.
Fixes: b8fbb39a (iris: Implement Gen12 workaround for non pipelined
state)
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
(cherry picked from commit a70a605ad63d95a6e7ce7cfd61fc1ca4e9616e74)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0942c4158247f16152375d180a8c2bc4f8d8d9d2
Author: Marek Olšák <marek.ol...@amd.com>
Date: Mon Feb 24 18:16:48 2020 -0500
tgsi_to_nir: set num_images and num_samplers with holes correctly
This fixes the copy_uv shader from st/omx, because it uses image 0 and 2
and image 1 isn't declared.
Cc: 20.0 <mesa-sta...@lists.freedesktop.org>
Reviewed-by: Rob Clark <robdcl...@gmail.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
(cherry picked from commit c798aae7390f20e74b8ebb09113e806b410ac7a7)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a9f1293b84fb4bcca2bec1eb7cdb298af488d37
Author: Eric Anholt <e...@anholt.net>
Date: Fri Feb 21 16:38:26 2020 -0800
turnip: Fix compiler warning about casting a nondispatchable handle.
Fixes: 1c5d84fcae71 ("turnip: hook up cmdbuffer event set/wait")
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>
(cherry picked from commit bd53f4f56b2ca93c1fe4f5af29b5040d2b32e88f)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5f0ae1f0b499ddce3afe7e38c391a1e76ecd88dc
Author: Tapani Pälli <tapani.pa...@intel.com>
Date: Wed Feb 26 10:30:42 2020 +0200
mesa/st: toggle EXT_texture_norm16 based on format support
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2556
Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Reviewed-by: Alejandro Piñeiro <apinhe...@igalia.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
(cherry picked from commit de4eb9a3bb9fb073a5bf5cc157918bfa0f62b394)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d189290f0e0cf2d3ed6c6e05482957a7f4740a2
Author: Tapani Pälli <tapani.pa...@intel.com>
Date: Wed Feb 26 10:29:49 2020 +0200
i965: toggle on EXT_texture_norm16
Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
(cherry picked from commit 200a83a98394ce292fd1cdbd6e9166502379b5c9)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c38d7f390d3d958515c96d58a213fc40f4ba6971
Author: Tapani Pälli <tapani.pa...@intel.com>
Date: Wed Feb 26 10:27:04 2020 +0200
mesa: introduce boolean toggle for EXT_texture_norm16
Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
(cherry picked from commit dc531869a918dc75ffc09b38851b750ba62673f8)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f45639452981300914ecc0fa42f593517c3bae2
Author: Mathias Fröhlich <mathias.froehl...@gmx.net>
Date: Sun Feb 9 19:01:53 2020 +0100
egl: Fix A2RGB10 platform_{device,surfaceless} PBuffer configs.
The __DRI_IMAGE_FORMAT_* part wants to be handled for the *101010
type formats as well. Factor out a common function for that task.
That again makes the piglit egl_ext_device_base test work again
for hardware drivers.
v2: Factor out a common function for that task.
v3: dri2_pbuffer_visuals -> dri2_pbuffer_visuals
Reviewed-by: Emil Velikov <emil.veli...@collabora.com>
Fixes: 9acb94b6236 "egl: Enable 10bpc EGLConfigs for
platform_{device,surfaceless}"
Signed-off-by: Mathias Fröhlich <mathias.froehl...@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
(cherry picked from commit d32c458de76c9e0cc08c9ee1a7de23c3fca69298)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=47bfaa8795f521b2aea970d1ba6dba776aef1ea8
Author: Jason Ekstrand <ja...@jlekstrand.net>
Date: Fri Feb 21 13:39:16 2020 -0600
anv: Always enable the data cache
Because we set the needs_data_cache bit from the NIR during compilation,
any time a shader was pulled out of the pipeline cache, we wouldn't set
the bit and the data cache was disabled. Fortunately, on Gen8+, this
bit is ignored because we always use the ALL section in the L3$ config
instead of separate DC and RO sections. On Gen7, however, this meant
that we were basically never running with the data cache enabled and our
compute performance was suffering massively because of it. This commit
improves Geekbench 5 scores on my Haswell GT3 by roughly 330% (no,
that's not a typo).
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>
(cherry picked from commit 5dfd83d7a1ce52a42485c54ca170311449379eb9)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=956a9c7d2a7013d8074e1b209b3cd4ea29338d59
Author: Dylan Baker <dy...@pnwbakers.com>
Date: Fri Feb 28 14:30:30 2020 -0800
.pick_status.json: Update to 09323634898ab3efc0150dc7d756bf36b1b89b76
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=20e6bcea31eb2e6cdd724e9ce56e95f23bd28b59
Author: Jose Maria Casanova Crespo <jmcasan...@igalia.com>
Date: Mon Nov 11 01:46:24 2019 +0100
v3d: Sync on last CS when non-compute stage uses resource written by CS
When a resource is written by a compute shader and then used by a
non-compute stage we sync on last compute job to guarantee that the
resource has been completely written when the next stage reads resources.
In the other cases how flushes are done guarantee the serialization of
the writes and reads.
To reproduce the failure the following tests should be executed in batch
as last test don't fail when run isolated:
KHR-GLES31.core.shader_image_load_store.basic-allFormats-load-fs
KHR-GLES31.core.shader_image_load_store.basic-allFormats-loadStoreComputeStage
KHR-GLES31.core.shader_image_load_store.basic-allTargets-load-cs
KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray
v2: Use fence dep instead of bo_wait (Eric Anholt)
v3: Rename struct names (Iago Toral)
Document why is not needed on graphics->compute case. (Iago Toral)
Follow same code pattern of the other update of in_sync_bcl.
v4: Fixed comments style. (Iago Toral)
Fixes KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
CC: 19.3 20.0 <mesa-sta...@lists.freedesktop.org>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2700>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2700>
(cherry picked from commit 01496e3d1ea0370af03e6645dbd2b864c2ace94c)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=16615264b2139fc68e51fab94e7800e0b615be2a
Author: Andreas Baierl <ich...@imkreisrum.de>
Date: Wed Feb 19 16:49:07 2020 +0100
gitlab-ci: lima: Add flaky tests to the skips list
Reviewed-by: Vasily Khoruzhick <anars...@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.viz...@collabora.com>
Signed-off-by: Andreas Baierl <ich...@imkreisrum.de>
Cc: <mesa-sta...@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
(cherry picked from commit 31a8075678f6517278985fe8bbaaec5100d7d826)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=555bf5f99118cf15504ca3c81c12d0a05f36caa9
Author: Dave Airlie <airl...@redhat.com>
Date: Mon Feb 24 10:29:46 2020 +1000
glx/drisw: fix shm put image fallback
The fallback to the non-shm put path used the wrong width here
as the pixmap is still allocated in a shared segment, so the
width needs to reflect that.
Fixes: 02c3dad0f3b4 ("Call shmget() with permission 0600 instead of 0777")
Reviewed-by: Michel Dänzer <mdaen...@redhat.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
(cherry picked from commit 84395190ec8cae6158737777c8def7cc3304eb3f)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2dac5a508c140562df40f9c50d546cf0a5558d8
Author: Dave Airlie <airl...@redhat.com>
Date: Mon Feb 24 10:19:51 2020 +1000
glx/drisw: return false if shmid == -1
If an attempt to create an shm pixmap in XCreateDrawable fails
then it ends up with the shmid == -1. This means the get image
path needs to fallback so return false in this case to use the
non-shm get image path.
Fixes: 02c3dad0f3b4 ("Call shmget() with permission 0600 instead of 0777")
Reviewed-by: Michel Dänzer <mdaen...@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
(cherry picked from commit 246e4aeaef4c1f1071c64e9681fc9229aac22020)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=01929a5d90a3bda760a0c9dd2e7f4c09fe7fcb3a
Author: Dave Airlie <airl...@redhat.com>
Date: Fri Feb 14 15:03:24 2020 +1000
glx/drisw: add getImageShm2 path
This adds return values to the get image path, so the caller can fallback.
Fixes: 02c3dad0f3b4 ("Call shmget() with permission 0600 instead of 0777")
Reviewed-by: Michel Dänzer <mdaen...@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
(cherry picked from commit 8d0bab8a9352bbb780bae6e7a432e73f7204f66a)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5b626396e01344b08d204b37cbd6080f547251e
Author: Dave Airlie <airl...@redhat.com>
Date: Fri Feb 14 15:00:13 2020 +1000
dri: add another get shm variant.
When Brian in 02c3dad0f3b4d26e0faa5cc51d06bc50d693dcdc restricted
the shm permissions it means we hit the fallback paths in some
scenarios we hadn't before.
When you use Xephyr to xdmcp from one user to another the new perms
stop the X server (running as user a) attaching to the SHM segments
from gnome-shell (running as user b).
In this case however only the GLX side of the code had insight into this,
and the dri could was meant of fall back, and it worked for put image
fine but the get image path was broken, since there was no indication
in the broken case of the need to fallback.
This adds a return type to a new interface member that lets the
caller know it has to fallback.
Fixes: 02c3dad0f3b4 ("Call shmget() with permission 0600 instead of 0777")
Reviewed-by: Michel Dänzer <mdaen...@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
(cherry picked from commit 466a0b2e4953018646ee344f5f6f6e9e84b66a1a)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9243bbc9f9b2b6924bdfa2b31e02df8cdd367ed2
Author: Dylan Baker <dy...@pnwbakers.com>
Date: Tue Feb 25 08:54:29 2020 -0800
.pick_status.json: Update to 01496e3d1ea0370af03e6645dbd2b864c2ace94c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d48c2965804c3fe82d7955499ab86f53b635d35
Author: Chris Wilson <ch...@chris-wilson.co.uk>
Date: Sat Feb 22 15:51:15 2020 +0000
iris: Fix import sync-file into syncobj
When importing a sync-file, the kernel expects to be told which syncobj
to replace with the new fence -- it does not automatically create a new
handle for us. Abide by this rule and create a new syncobj for the
imported sync-file.
Fixes: f459c56be6bf ("iris: Add fence support using drm_syncobj")
Cc: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3919>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3919>
(cherry picked from commit ae7bda27a0691d6d89c35c9f732b6e49d726c17f)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d7f95b226b51142bc1cb6f327c5c0de8c30ac282
Author: Kenneth Graunke <kenn...@whitecape.org>
Date: Wed Feb 5 00:52:45 2020 -0800
iris: Fix BLORP vertex buffers to respect ISL MOCS settings
Fixes: a4da6008b6a ("iris: Use mocs from isl_dev.")
Reviewed-by: Tapani Pälli <tapani.pa...@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
(cherry picked from commit 4bac2fa3c6d30537e444c555f182abd9c739cfd4)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=23043719f75c0a29524e41d508d1161789030f37
Author: Kenneth Graunke <kenn...@whitecape.org>
Date: Wed Feb 5 01:02:30 2020 -0800
iris: Make mocs an inline helper in iris_resource.h
Now that it uses ISL rather than genxml code, there's no need for it to
live as a vtable function inside the state module. We can just make it
a static inline helper in iris_resource.h so it's available throughout
the codebase.
Fixes: a4da6008b6a ("iris: Use mocs from isl_dev.")
Reviewed-by: Tapani Pälli <tapani.pa...@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
(cherry picked from commit 1cdf5abdfaeba5a89574d7cc374e5667be2e2f93)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4fbaecd76835906fa0cc9a00c16164eae53bd4a8
Author: Arcady Goldmints-Orlov <agoldmi...@igalia.com>
Date: Fri Feb 21 12:47:10 2020 -0600
spirv: Remove outdated SPIR-V decoration warnings
spirv_to_nir warns if it encounters XFB decorations and errors if
it encounters a Stream decoration with value other than 0, despite
the fact that these decorations are in fact handled correctly.
Fixes dEQP-VK.transform_feedback.simple.query_1_*
Fixes: cd4a14be06 "spirv: Handle XFB variable decorations"
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3910>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3910>
(cherry picked from commit 5f3cbbd958d14924dded0e0a0908127f6bfa006d)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=91de922c7ff280b33dec31908c0146761b832d97
Author: Erik Faye-Lund <erik.faye-l...@collabora.com>
Date: Mon Feb 10 13:08:28 2020 +0100
util: promote u_debug_memory.c to src/util
When os_memory_debug.h was promoted to src/util, this source-file on
which it depends on when the debug-flag is set on windows was left
out. So let's move this also.
It doesn't seem there's any way of triggering this issue right now, but
it seems better to correct this to avoid this from biting us in the ass
in the future.
Fixes: 88c4680b5a5 ("util: promote u_memory to src/util")
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Reviewed-by: Jose Fonseca <jfons...@vmware.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3844>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3844>
(cherry picked from commit 2e3318b151abddd456077ec0eed13f95245ce344)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=410dad2eb44bf1ee0dc08e2bc3c935cf9f057e4f
Author: Dylan Baker <dy...@pnwbakers.com>
Date: Mon Feb 24 11:16:25 2020 -0800
.pick_status.json: Update to e4baff90812d799d586296fcad992ddcc553c359
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d3f535ebb341ddce05e5b1750fcf17c6c4166c9
Author: James Xiong <james.xi...@intel.com>
Date: Wed Nov 20 15:59:00 2019 -0800
iris: handle the failure of converting unsupported yuv formats to isl
Signed-off-by: James Xiong <james.xi...@intel.com>
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
(cherry picked from commit d8569baaed1a38cf3da9e45375fa2267d9a1eeb0)
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3898>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3898>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a7ae6be76b9681fbbc71249b6e73ce9c80fe456
Author: Danylo Piliaiev <danylo.pilia...@globallogic.com>
Date: Tue Dec 24 14:19:24 2019 +0200
i965: Do not generate D16 B5G6R5_UNORM configs on gen < 8
We don't support MESA_FORMAT_Z_UNORM16 before Gen8, see
intel_screen_init_surface_formats.
As a consequence disables B5G6R5_UNORM configs with depth
on gen < 6.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2275
CC: <mesa-sta...@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.pilia...@globallogic.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3206>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3206>
(cherry picked from commit 5bfd363be4c957c1f7b5c1f3069346f2bce2cd5a)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5adcb0a62acc57e15cbb656f628c76b8d16a17c8
Author: Marek Olšák <marek.ol...@amd.com>
Date: Tue Feb 18 16:12:23 2020 -0500
util: remove the dependency on kcmp.h
Fixes: f76cbc7901f7 "util: Add os_same_file_description helper"
Acked-by: Eric Engestrom <e...@engestrom.ch>
Reviewed-by: Michel Dänzer <mdaen...@redhat.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3860>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3860>
(cherry picked from commit f7bfb10c69dfe48a91e35523cb5ee641bdbf6988)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=01020aef25cca94713ac860256d2eb6296b45d1a
Author: Ian Romanick <ian.d.roman...@intel.com>
Date: Tue Feb 11 12:00:00 2020 -0800
intel/fs: Correctly handle multiply of fsign with a source modifier
The other source of the multiply will be interpreted as a uint32_t in an
XOR instruction. Any source modifiers with either not be interpreted at
all or will be misinterpreted due to the differing types.
If the other operand of the multiplication has a source modifier, just
emit an extra move to resolve the source modifiers.
The negation source modifier problem is difficult to reproduce due to an
algebraic optimization that changes (-a*b) to -(a*b). However, changes
in MR !1359 push the negations back down.
On Gen7+ it might be possible to do slightly better for an abs() source
modifier by using BFI2 as a glorified copysign().
On Gen8+ it might be possible to do slightly better for a neg() source
modifier by emitting (~a ^ b).
There were no shader-db changes on any Intel platform, so I think we can
deal with that problem when it arises.
See also piglit!224.
Fixes: 06d2c116415 ("intel/fs: Add a scale factor to emit_fsign")
Reviewed-by: Matt Turner <matts...@gmail.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3780>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3780>
(cherry picked from commit 273b8cd1ca286e2f43b4a464a391fdcaac49f077)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d43407e622fa6b579034c5cd57a7da16ab3e4d43
Author: Bas Nieuwenhuizen <ba...@chromium.org>
Date: Tue Feb 18 15:22:39 2020 +0100
radeonsi: Fix compute copies for subsampled formats.
We cannot do image stores (or render) to subsampled formats.
Reinterpret as R32_UINT instead.
si_set_shader_image_desc already uses the blockwidth from
the view formats, so the image width adjustments are
already implemented.
This is still icky with mipmapping on GFX9+ though, but
since it is mostly a video format I don't think that will
be much of an issue and broken mipmapping is still better
than broken everything.
Fixes: e5167a9276d "radeonsi: disable SDMA on gfx8 to fix corruption on RX
580"
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2535
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853>
(cherry picked from commit 68d1757420be28e99e4e919ed2e0c6062e2460c5)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=760b8cfd1c3afd483eea30383a2cc7593f7640dd
Author: Ian Romanick <ian.d.roman...@intel.com>
Date: Tue Feb 18 15:31:37 2020 -0800
nir/search: Use larger type to hold linearized index
"index" is an offset into a linearized 3-dimensional array. Starting
with fbd5359a0a6, the 3-dimensional array can have 43 elements in each
dimension. 43**3 = 79507, and that will overflow the uint16_t.
See also the discussion in MR !3765.
Fixes: fbd5359a0a6 ("nir/algebraic: Rearrange bcsel sequences generated by
nir_opt_peephole_select")
Suggested-by: Connor Abbott <cwabbo...@gmail.com>
Reviewed-by: Connor Abbott <cwabbo...@gmail.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3871>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3871>
(cherry picked from commit 58bdc1c748f2922b3970c3b3a41d1b0977f07886)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5376a799628259b51b432a6a746ff68f13b07ed1
Author: Michel Dänzer <mdaen...@redhat.com>
Date: Tue Feb 18 12:12:01 2020 +0100
st/vdpau: Only call is_video_format_supported hook if needed
Namely only if *is_supported is true, otherwise the hook result can't
affect it.
Avoids
../src/gallium/state_trackers/vdpau/vdpau_private.h:138: FormatYCBCRToPipe:
Assertion `0' failed.
with assertions enabled.
Fixes: 5d5b414a7b84 "st/vdpau: fix chroma_format handling in
VideoSurfaceQueryGetPutBitsYCbCrCapabilities"
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-pra...@amd.com>
Reviewed-by: Christian König <christian.koe...@amd.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3848>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3848>
(cherry picked from commit 7e6010106fb3c4eb5436de869183e857243c1006)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d499e9b4e25daf4649cce11354249a2a68d5571d
Author: Eric Anholt <e...@anholt.net>
Date: Tue Jan 28 13:14:47 2020 -0800
llvmpipe: Fix real uninitialized use of "atype" for SEMANTIC_FACE
Fixes: 502548a09c5a ("gallivm/llvmpipe: add support for front facing in
sysval.")
Reviewed-by: Roland Scheidegger <srol...@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
(cherry picked from commit 45b2ccc6b30c9e4c3382e6b462a2f5357c15d3b8)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=387ee33305140981d263956e756117429b50c090
Author: Marek Olšák <marek.ol...@amd.com>
Date: Thu Feb 13 23:14:47 2020 -0500
mesa: fix immediate mode with tessellation and varying patch vertices
Cc: 19.3 20.0 <mesa-sta...@lists.freedesktop.org>
Reviewed-by: Mathias Fröhlich <mathias.froehl...@web.de>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
(cherry picked from commit 2e05a280b6b6d334388e3824bd82472ccbf33252)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cdc4ea14965974232d0ecea8cb67c21115f6ca74
Author: Caio Marcelo de Oliveira Filho <caio.olive...@intel.com>
Date: Fri Jan 31 10:20:25 2020 -0800
intel/gen12: Take into account opcode when decoding SWSB
The interpretation of the fields is different depending whether the
instruction is a SEND/MATH or not.
This fixes the disassembly output for non-SEND/MATH instructions that
have both in-order and out-of-order dependencies. Their dependencies
were wrongly represented as `@A $B` when the correct would be `@A
$B.dst`.
Fixes: 6154cdf924f ("intel/eu/gen12: Add auxiliary type to represent SWSB
information during codegen.")
Fixes: 83612c01271 ("intel/disasm/gen12: Disassemble software scoreboard
information.")
Acked-by: Francisco Jerez <curroje...@riseup.net>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3660>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3660>
(cherry picked from commit 79788b8f7f07460af8467931501380e47b485e36)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d9f4578d673ce95d9aa717ced8391222e80afa2
Author: Dylan Baker <dy...@pnwbakers.com>
Date: Thu Feb 20 09:10:35 2020 -0800
.pick_status.json: Update to 8291d728dc997e87b4d2e4e451692643a1dba881
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