Module: Mesa
Branch: staging/20.0
Commit: 5d57fe5cb7b3418ae57a9db0f486b5daa8019e5b
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d57fe5cb7b3418ae57a9db0f486b5daa8019e5b

Author: Rafael Antognolli <[email protected]>
Date:   Tue Feb 25 15:08:32 2020 -0800

iris: Wait for the GPU to be idle before invalidating the aux table.

An end of pipe sync seems to satisfy this restriction. It takes care of
GPU hangs seen in dEQP-GLES31.functional.copy_image.* tests.

Reviewed-by: Jason Ekstrand <[email protected]>
Tested-by: Marge Bot 
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
(cherry picked from commit b4ddc6139b9534fb4559948ebcbaf96c76097d55)

---

 .pick_status.json                     |  2 +-
 src/gallium/drivers/iris/iris_state.c | 12 ++++++++++++
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/.pick_status.json b/.pick_status.json
index 1cbacc90be3..286f838a176 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -6115,7 +6115,7 @@
         "description": "iris: Wait for the GPU to be idle before invalidating 
the aux table.",
         "nominated": false,
         "nomination_type": null,
-        "resolution": 4,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": null
     },
diff --git a/src/gallium/drivers/iris/iris_state.c 
b/src/gallium/drivers/iris/iris_state.c
index a7795b076bb..5f34c06447b 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -5131,6 +5131,18 @@ genX(invalidate_aux_map_state)(struct iris_batch *batch)
       return;
    uint32_t aux_map_state_num = gen_aux_map_get_state_num(aux_map_ctx);
    if (batch->last_aux_map_state != aux_map_state_num) {
+      /* HSD 1209978178: docs say that before programming the aux table:
+       *
+       *    "Driver must ensure that the engine is IDLE but ensure it doesn't
+       *    add extra flushes in the case it knows that the engine is already
+       *    IDLE."
+       *
+       * An end of pipe sync is needed here, otherwise we see GPU hangs in
+       * dEQP-GLES31.functional.copy_image.* tests.
+       */
+      iris_emit_end_of_pipe_sync(batch, "Invalidate aux map table",
+                                 PIPE_CONTROL_CS_STALL);
+
       /* If the aux-map state number increased, then we need to rewrite the
        * register. Rewriting the register is used to both set the aux-map
        * translation table address, and also to invalidate any previously

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