2011/1/23 Mathias Fröhlich <[email protected]>: > > Hi, > > Attached is a patch to implement timer queries for r600g. > > I have not found much documentation about the frequency of the gpu's timestamp > counter. But What I have found indicates that it runs at 27MHz which is > implemented in the patch and gives 'reasonable' query results with osgviewer. >
It varies based on what crystal is on the card (27 Mhz is the most common, but you also see 100 Mhz, and 14.32 Mhz as well). We'll need a new radeon_info ioctl query (see attached). Alex > Please review and may be apply. > > Thanks, > Mathias > > _______________________________________________ > mesa-dev mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/mesa-dev > >
From 06a968cdac7c0e9bc3ab15a182e199ea83458aaa Mon Sep 17 00:00:00 2001 From: Alex Deucher <[email protected]> Date: Sun, 23 Jan 2011 20:05:40 -0500 Subject: [PATCH] drm/radeon/kms: add new radeon_info ioctl query for clock crystal freq Needed for timer queries in the 3D driver. Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/radeon/radeon_drv.c | 2 +- drivers/gpu/drm/radeon/radeon_kms.c | 4 ++++ include/drm/radeon_drm.h | 1 + 3 files changed, 6 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index d5680a0..275b26a 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -48,7 +48,7 @@ * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs - * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK + * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query */ #define KMS_DRIVER_MAJOR 2 #define KMS_DRIVER_MINOR 8 diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 28a53e4..9832129 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c @@ -201,6 +201,10 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) } radeon_set_filp_rights(dev, &rdev->cmask_filp, filp, &value); break; + case RADEON_INFO_CLOCK_CRYSTAL_FREQ: + /* return clock value in KHz */ + value = rdev->clock.spll.reference_freq * 10; + break; default: DRM_DEBUG_KMS("Invalid request %d\n", info->request); return -EINVAL; diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h index e95a86b..e5c607a 100644 --- a/include/drm/radeon_drm.h +++ b/include/drm/radeon_drm.h @@ -907,6 +907,7 @@ struct drm_radeon_cs { #define RADEON_INFO_TILING_CONFIG 0x06 #define RADEON_INFO_WANT_HYPERZ 0x07 #define RADEON_INFO_WANT_CMASK 0x08 /* get access to CMASK on r300 */ +#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x09 /* clock crystal frequency */ struct drm_radeon_info { uint32_t request; -- 1.7.1.1
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