From: Ian Romanick <ian.d.roman...@intel.com>
Itrating over all 3 possible source registers regardless of the opcode
was causing a variety of problems. The most noticable was an
occasional assertion failure:
brw_vs_emit.c:1381: get_src_reg: Assertion `c->regs[file][index].nr !=
0' failed.
This assertion seemed to be triggered by reading from an uniform
array-of-matrix using multiple non-constant indices.
Fixes i965 piglit:
vs-uniform-array-mat[234]-col-row-rd
vs-uniform-array-mat[234]-index-col-row-rd
vs-uniform-array-mat[234]-index-row-rd
vs-uniform-mat[234]-col-row-rd
---
src/mesa/drivers/dri/i965/brw_vs_emit.c | 12 ++++++++----
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c
b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 9d73334..3949382 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -220,8 +220,9 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c )
i++) {
struct prog_instruction *inst = &c->vp->program.Base.Instructions[i];
int arg;
+ const unsigned num_src = _mesa_num_inst_src_regs(inst->Opcode);
- for (arg = 0; arg < 3 && constant < max_constant; arg++) {
+ for (arg = 0; arg < num_src && constant < max_constant; arg++) {
if (inst->SrcReg[arg].File != PROGRAM_STATE_VAR &&
inst->SrcReg[arg].File != PROGRAM_CONSTANT &&
inst->SrcReg[arg].File != PROGRAM_UNIFORM &&
@@ -1931,11 +1932,12 @@ void brw_vs_emit(struct brw_vs_compile *c )
for (insn = 0; insn < nr_insns; insn++) {
GLuint i;
struct prog_instruction *inst = &c->vp->program.Base.Instructions[insn];
+ const unsigned num_src = _mesa_num_inst_src_regs(inst->Opcode);
/* Message registers can't be read, so copy the output into GRF
* register if they are used in source registers
*/
- for (i = 0; i < 3; i++) {
+ for (i = 0; i < num_src; i++) {
struct prog_src_register *src = &inst->SrcReg[i];
GLuint index = src->Index;
GLuint file = src->File;
@@ -1975,8 +1977,9 @@ void brw_vs_emit(struct brw_vs_compile *c )
/* Get argument regs. SWZ is special and does this itself.
*/
- if (inst->Opcode != OPCODE_SWZ)
- for (i = 0; i < 3; i++) {
+ if (inst->Opcode != OPCODE_SWZ) {
+ const unsigned num_src = _mesa_num_inst_src_regs(inst->Opcode);
+ for (i = 0; i < num_src; i++) {
const struct prog_src_register *src = &inst->SrcReg[i];
index = src->Index;
file = src->File;
@@ -1985,6 +1988,7 @@ void brw_vs_emit(struct brw_vs_compile *c )
else
args[i] = get_arg(c, inst, i);
}
+ }
/* Get dest regs. Note that it is possible for a reg to be both
* dst and arg, given the static allocation of registers. So
--
1.7.4.4
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