This commit pushes makes uniform offsets be terms of bytes starting with
nir_lower_io. They get converted to be in terms of floats when we cram
them in the UNIFORM register file but reladdr remains in terms of bytes all
the way down to the point where we lower it to a pull constant load.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 4 +---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 10 +++++++---
src/mesa/drivers/dri/i965/brw_nir.c | 17 ++++++++++++++---
3 files changed, 22 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 9e2b1fa2..9fbf199 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1999,11 +1999,9 @@ fs_visitor::demote_pull_constants()
/* Generate a pull load into dst. */
if (inst->src[i].reladdr) {
- fs_reg indirect = ibld.vgrf(BRW_REGISTER_TYPE_D);
- ibld.MUL(indirect, *inst->src[i].reladdr, brw_imm_d(4));
VARYING_PULL_CONSTANT_LOAD(ibld, dst,
brw_imm_ud(index),
- indirect,
+ *inst->src[i].reladdr,
pull_index * 4);
inst->src[i].reladdr = NULL;
inst->src[i].stride = 1;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 39111ba..6ab9c1e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1145,7 +1145,7 @@ fs_visitor::get_nir_image_deref(const nir_deref_var
*deref)
bld.MOV(tmp, get_nir_src(deref_array->indirect));
}
- bld.MUL(tmp, tmp, brw_imm_ud(element_size));
+ bld.MUL(tmp, tmp, brw_imm_ud(element_size * 4));
if (image.reladdr)
bld.ADD(*image.reladdr, *image.reladdr, tmp);
else
@@ -2280,8 +2280,12 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld,
nir_intrinsic_instr *instr
has_indirect = true;
/* fallthrough */
case nir_intrinsic_load_uniform: {
- fs_reg uniform_reg(UNIFORM, instr->const_index[0]);
- uniform_reg.reg_offset = instr->const_index[1];
+ /* Offsets are in bytes but they should always be multiples of 4 */
+ assert(instr->const_index[0] % 4 == 0);
+ assert(instr->const_index[1] % 4 == 0);
+
+ fs_reg uniform_reg(UNIFORM, instr->const_index[0] / 4);
+ uniform_reg.reg_offset = instr->const_index[1] / 4;
for (unsigned j = 0; j < instr->num_components; j++) {
fs_reg src = offset(retype(uniform_reg, dest.type), bld, j);
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c
b/src/mesa/drivers/dri/i965/brw_nir.c
index e602df7..a33fb31 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -171,12 +171,23 @@ brw_nir_lower_outputs(nir_shader *nir, bool is_scalar)
}
}
+static int
+type_size_scalar_bytes(const struct glsl_type *type)
+{
+ return type_size_scalar(type) * 4;
+}
+
static void
brw_nir_lower_uniforms(nir_shader *nir, bool is_scalar)
{
- nir_assign_var_locations(&nir->uniforms,
- &nir->num_uniforms,
- is_scalar ? type_size_scalar : type_size_vec4);
+ if (is_scalar) {
+ nir_assign_var_locations(&nir->uniforms, &nir->num_uniforms,
+ type_size_scalar_bytes);
+ nir_lower_io(nir, nir_var_uniform, type_size_scalar_bytes);
+ } else {
+ nir_assign_var_locations(&nir->uniforms, &nir->num_uniforms,
+ type_size_vec4);
+ }
}
static bool
--
2.5.0.400.gff86faf
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