Matt Turner <matts...@gmail.com> writes: > On Tue, May 3, 2016 at 3:28 PM, Francisco Jerez <curroje...@riseup.net> wrote: >> Matt Turner <matts...@gmail.com> writes: >> >>> Beginning with commit 7b208a73, Unigine Valley began hanging the GPU on >>> Gen >= 8 platforms. This patch avoids the GPU hangs, but does not >>> implement a full work around for the restriction (dispatch_width == 16 >>> is an imperfect proxy). >>> >> Sounds like for a proper fix we could just check the last instruction in >> the assembly at the top of the generator loop and emit a NOP in cases >> where the previous instruction is one of the affected math opcodes? > > If I assume correctly that you mean "so we can check if the following > instruction has two destination registers", then yes that would be > good. > Yes, of course.
> What's the best way to check that? > inst->dst.component_size(inst->exec_size) > REG_SIZE ? Sounds reasonable to me. :)
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