When Paul originally wrote blorp he hand-rolled a shader builder that
builds i965 shaders directly.  This has caused headaches because every time
we make a change to the back-end compiler, we have to update blorp.  NIR on
the other hand tends to be more stable at this point since it has many
different users all across mesa.

Using NIR also means that we get decent optimizations, register allocation,
and scheduling.  The original blorp codegen code tried fairly hard to emit
reasonably efficient code in that it didn't do more work than needed but it
was fairly naieve when it came to register allocation and scheduling.
Using the full compiler stack also means that we get new features for free
without having to re-implement them in blorp.  On Sky Lake, for instance,
we are now generating shaders with sampler-EOT.

In spite of all this, this series shows no measurable performance
difference on Haswell with every benchmark in sixonyx run 25 times.

Jason Ekstrand (28):
  nir: Add an info bit for uses_sample_qualifier
  i965/fs: Rework the persample shading key/prog_data bits
  i965/state: Clean up WM/PS state to pull more things out of prog_data
  i965/fs: Clean up the logic in compile_fs a bit
  i965/fs: Stop setting dispatch_grf_start_reg from the visitor
  i965/gen7_wm: Move where we set the fast clear op
  i965/fs: Organize prog_data by ksp number rather than SIMD width
  i965/blorp: Simplify the sample layout calculation
  i965/fs: Use MRF0 for the repclear message
  nir/builder: Generate the alu helpers directly in python
  nir/builder: Add a helper for grabbing multiple channels from an ssa
    def
  nir: Add texture opcodes and source types for multisample compression
  i965/fs: Implement the new NIR MCS texturing
  i965/blorp: Add a prog_data_init helper
  i965/blorp: Add a param array to prog_data
  blorp: Add initial state setup support for SIMD8 dispatch
  i965/blorp: Add a helper for compiling NIR shaders
  i965/blorp: Create the program key in get_clear_kernel
  i965/blorp: Use NIR for clear shaders
  i965/blorp: Refactor getting the blit kernel into a helper
  i965/blorp: Add initial support for NIR-based blit shaders
  i965/blorp: Add support for discard-based bounds checks to the NIR
    path
  i965/blorp: Add support for W-[de]tiling to the NIR path
  i965/blorp: Add MSAA encode/decode support to the NIR path
  i965/blorp: Add support for averaging resolves to the NIR path
  i965/blorp: Add bilinear blending support to the NIR path
  i965/blorp: Refactor coordinate munging
  i965/blorp: Delete the old blorp shader emit code

 src/compiler/nir/glsl_to_nir.cpp                  |    1 +
 src/compiler/nir/nir.h                            |   11 +
 src/compiler/nir/nir_builder.h                    |   44 +-
 src/compiler/nir/nir_builder_opcodes_h.py         |   14 +-
 src/compiler/nir/nir_gather_info.c                |    8 +-
 src/compiler/nir/nir_print.c                      |    6 +
 src/intel/vulkan/anv_meta_blit2d.c                |    4 +-
 src/intel/vulkan/anv_pipeline.c                   |   46 +-
 src/intel/vulkan/anv_private.h                    |    5 -
 src/intel/vulkan/gen7_pipeline.c                  |   12 +-
 src/intel/vulkan/gen8_pipeline.c                  |   12 +-
 src/mesa/drivers/dri/i965/Makefile.sources        |    2 -
 src/mesa/drivers/dri/i965/brw_blorp.c             |  111 ++
 src/mesa/drivers/dri/i965/brw_blorp.h             |   26 +-
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp      | 2208 +++++++++------------
 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp   |  145 --
 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h     |  212 --
 src/mesa/drivers/dri/i965/brw_blorp_clear.cpp     |  200 +-
 src/mesa/drivers/dri/i965/brw_compiler.h          |   16 +-
 src/mesa/drivers/dri/i965/brw_defines.h           |    1 -
 src/mesa/drivers/dri/i965/brw_fs.cpp              |  173 +-
 src/mesa/drivers/dri/i965/brw_fs.h                |    1 -
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp    |   21 -
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp          |   14 +-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp      |    2 +-
 src/mesa/drivers/dri/i965/brw_shader.cpp          |    3 +-
 src/mesa/drivers/dri/i965/brw_state.h             |    8 +-
 src/mesa/drivers/dri/i965/brw_vec4.cpp            |    2 +
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp |    1 +
 src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp        |    1 +
 src/mesa/drivers/dri/i965/brw_wm.c                |   19 +-
 src/mesa/drivers/dri/i965/brw_wm_state.c          |   31 +-
 src/mesa/drivers/dri/i965/gen6_blorp.c            |   35 +-
 src/mesa/drivers/dri/i965/gen6_wm_state.c         |   93 +-
 src/mesa/drivers/dri/i965/gen7_blorp.c            |   27 +-
 src/mesa/drivers/dri/i965/gen7_wm_state.c         |   47 +-
 src/mesa/drivers/dri/i965/gen8_blorp.c            |   23 +-
 src/mesa/drivers/dri/i965/gen8_ps_state.c         |   64 +-
 38 files changed, 1446 insertions(+), 2203 deletions(-)
 delete mode 100644 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
 delete mode 100644 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h

-- 
2.5.0.400.gff86faf

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