This series fixes the FS register spilling code to apply correct channel masks to the spilled data regardless of the datatype and execution controls of the generating instruction, which is especially important for instructions manipulating data of type size other than 32 bit (e.g. FP64) or instructions with non-trivial execution controls (which will become somewhat more common in SIMD32 shaders).
A bunch of FP64 piglit tests that spill registers are fixed by this series, and it considerably improves the piglit test pass rate with INTEL_DEBUG set to spill_fs to force the register allocator to spill all registers -- On SKL I only need an additional workaround to get it to survive a full spill_fs piglit run without hangs or regressions, but because the problem doesn't seem to be compiler-related I plan to address it separately after some additional investigation. You can find the same series in my Mesa tree: https://cgit.freedesktop.org/~currojerez/mesa/log/?h=i965-spilling-fixes _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev