From: Nicolai Hähnle <nicolai.haeh...@amd.com>
---
src/gallium/drivers/radeon/radeon_winsys.h | 1 -
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 2 --
src/gallium/winsys/radeon/drm/radeon_drm_surface.c | 2 --
3 files changed, 5 deletions(-)
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h
b/src/gallium/drivers/radeon/radeon_winsys.h
index f32edf0..1069193 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -391,7 +391,6 @@ struct radeon_surf {
uint32_t mtilea;
uint32_t tile_split;
uint32_t stencil_tile_split;
- uint64_t stencil_offset;
struct radeon_surf_level level[RADEON_SURF_MAX_LEVEL];
struct radeon_surf_level stencil_level[RADEON_SURF_MAX_LEVEL];
uint32_t tiling_index[RADEON_SURF_MAX_LEVEL];
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
index 081f0e1..dd033e0 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
@@ -455,8 +455,6 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
return r;
if (level == 0) {
- surf->stencil_offset = surf->stencil_level[0].offset;
-
/* For 2D modes only. */
if (AddrSurfInfoOut.tileMode >= ADDR_TM_2D_TILED_THIN1) {
surf->stencil_tile_split =
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_surface.c
b/src/gallium/winsys/radeon/drm/radeon_drm_surface.c
index c6025ff..0399e5a 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_surface.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_surface.c
@@ -123,7 +123,6 @@ static void surf_winsys_to_drm(struct radeon_surface
*surf_drm,
surf_drm->mtilea = surf_ws->mtilea;
surf_drm->tile_split = surf_ws->tile_split;
surf_drm->stencil_tile_split = surf_ws->stencil_tile_split;
- surf_drm->stencil_offset = surf_ws->stencil_offset;
for (i = 0; i < RADEON_SURF_MAX_LEVEL; i++) {
surf_level_winsys_to_drm(&surf_drm->level[i], &surf_ws->level[i]);
@@ -163,7 +162,6 @@ static void surf_drm_to_winsys(struct radeon_drm_winsys *ws,
surf_ws->mtilea = surf_drm->mtilea;
surf_ws->tile_split = surf_drm->tile_split;
surf_ws->stencil_tile_split = surf_drm->stencil_tile_split;
- surf_ws->stencil_offset = surf_drm->stencil_offset;
surf_ws->macro_tile_index = cik_get_macro_tile_index(surf_ws);
--
2.7.4
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