On 14/07/16 02:04, Matt Turner wrote:
> On Tue, Jul 12, 2016 at 11:42 PM, Samuel Iglesias Gonsálvez
> <sigles...@igalia.com> wrote:
>> Signed-off-by: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
>> ---
>> src/mesa/drivers/dri/i965/brw_defines.h | 2 +-
>> src/mesa/drivers/dri/i965/brw_eu.c | 2 +-
>> src/mesa/drivers/dri/i965/brw_eu.h | 1 +
>> src/mesa/drivers/dri/i965/brw_eu_emit.c | 1 +
>> src/mesa/drivers/dri/i965/brw_fs_builder.h | 1 +
>> src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 7 +++++++
>> src/mesa/drivers/dri/i965/brw_vec4.h | 2 ++
>> src/mesa/drivers/dri/i965/brw_vec4_builder.h | 1 +
>> src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 7 +++++++
>> src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 1 +
>> 10 files changed, 23 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
>> b/src/mesa/drivers/dri/i965/brw_defines.h
>> index d2cd53a..740d03d 100644
>> --- a/src/mesa/drivers/dri/i965/brw_defines.h
>> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
>> @@ -857,7 +857,7 @@ enum opcode {
>> BRW_OPCODE_XOR = 7,
>> BRW_OPCODE_SHR = 8,
>> BRW_OPCODE_SHL = 9,
>> - // BRW_OPCODE_DIM = 10, /**< Gen7.5 only */ /* Reused */
>> + BRW_OPCODE_DIM = 10, /**< Gen7.5 only */ /* Reused */
>> // BRW_OPCODE_SMOV = 10, /**< Gen8+ */ /* Reused */
>> /* Reserved - 11 */
>> BRW_OPCODE_ASR = 12,
>> diff --git a/src/mesa/drivers/dri/i965/brw_eu.c
>> b/src/mesa/drivers/dri/i965/brw_eu.c
>> index cc252de..3a309dc 100644
>> --- a/src/mesa/drivers/dri/i965/brw_eu.c
>> +++ b/src/mesa/drivers/dri/i965/brw_eu.c
>> @@ -421,7 +421,7 @@ enum gen {
>> #define GEN_LE(gen) (GEN_LT(gen) | (gen))
>>
>> static const struct opcode_desc opcode_10_descs[] = {
>> - { .name = "dim", .nsrc = 0, .ndst = 0, .gens = GEN75 },
>> + { .name = "dim", .nsrc = 1, .ndst = 1, .gens = GEN75 },
>> { .name = "smov", .nsrc = 0, .ndst = 0, .gens = GEN_GE(GEN8) },
>> };
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
>> b/src/mesa/drivers/dri/i965/brw_eu.h
>> index b057f17..09f51db 100644
>> --- a/src/mesa/drivers/dri/i965/brw_eu.h
>> +++ b/src/mesa/drivers/dri/i965/brw_eu.h
>> @@ -157,6 +157,7 @@ ALU2(OR)
>> ALU2(XOR)
>> ALU2(SHR)
>> ALU2(SHL)
>> +ALU1(DIM)
>> ALU2(ASR)
>> ALU1(F32TO16)
>> ALU1(F16TO32)
>> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> b/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> index 2a8e661..f2f55410 100644
>> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> @@ -1064,6 +1064,7 @@ ALU2(OR)
>> ALU2(XOR)
>> ALU2(SHR)
>> ALU2(SHL)
>> +ALU1(DIM)
>> ALU2(ASR)
>> ALU1(FRC)
>> ALU1(RNDD)
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs_builder.h
>> b/src/mesa/drivers/dri/i965/brw_fs_builder.h
>> index f22903e..8e43484 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs_builder.h
>> +++ b/src/mesa/drivers/dri/i965/brw_fs_builder.h
>> @@ -460,6 +460,7 @@ namespace brw {
>> ALU1(CBIT)
>> ALU2(CMPN)
>> ALU3(CSEL)
>> + ALU1(DIM)
>> ALU2(DP2)
>> ALU2(DP3)
>> ALU2(DP4)
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> index ce1ec0a..ba213b1 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> @@ -2082,6 +2082,13 @@ fs_generator::generate_code(const cfg_t *cfg, int
>> dispatch_width)
>> generate_barrier(inst, src[0]);
>> break;
>>
>> + case BRW_OPCODE_DIM:
>> + assert(devinfo->is_haswell);
>> + assert(src[0].type == BRW_REGISTER_TYPE_F);
>
> As I say in reply to PATCH 3/3, I think it's better to use type DF for
> src0 in the IR, and just fix the type to F here in the generator.
>
> I would just assert that src[0].type is DF, and then...
>
>> + assert(dst.type == BRW_REGISTER_TYPE_DF);
>> + brw_DIM(p, dst, src[0]);
>
> brw_DIM(p, dst, retype(src[0], BRW_REGISTER_TYPE_F));
>
>> + break;
>
> The indentation looks wrong here.
>
Right. Thanks for the comments!
Sam
>> +
>> default:
>> unreachable("Unsupported opcode");
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
>> b/src/mesa/drivers/dri/i965/brw_vec4.h
>> index 76dea04..3043147 100644
>> --- a/src/mesa/drivers/dri/i965/brw_vec4.h
>> +++ b/src/mesa/drivers/dri/i965/brw_vec4.h
>> @@ -213,6 +213,8 @@ public:
>> EMIT3(MAD)
>> EMIT2(ADDC)
>> EMIT2(SUBB)
>> + EMIT1(DIM)
>> +
>> #undef EMIT1
>> #undef EMIT2
>> #undef EMIT3
>> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_builder.h
>> b/src/mesa/drivers/dri/i965/brw_vec4_builder.h
>> index 3a8617e..d25a87a 100644
>> --- a/src/mesa/drivers/dri/i965/brw_vec4_builder.h
>> +++ b/src/mesa/drivers/dri/i965/brw_vec4_builder.h
>> @@ -373,6 +373,7 @@ namespace brw {
>> ALU1(CBIT)
>> ALU2(CMPN)
>> ALU3(CSEL)
>> + ALU1(DIM)
>> ALU2(DP2)
>> ALU2(DP3)
>> ALU2(DP4)
>> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
>> b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
>> index bb0254e..bcddafe 100644
>> --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
>> @@ -2014,6 +2014,13 @@ generate_code(struct brw_codegen *p,
>> generate_mov_indirect(p, inst, dst, src[0], src[1], src[2]);
>> break;
>>
>> + case BRW_OPCODE_DIM:
>> + assert(devinfo->is_haswell);
>> + assert(src[0].type == BRW_REGISTER_TYPE_F);
>
> Same thing.
>
>> + assert(dst.type == BRW_REGISTER_TYPE_DF);
>> + brw_DIM(p, dst, src[0]);
>> + break;
>> +
>
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