On Fri, Jul 29, 2016 at 8:33 PM, Eric Engestrom <e...@engestrom.ch> wrote:
> Previously, the bitshift would be performed on a simple int (32 bits on
> most systems), overflow, and then be cast to 64 bits.
and actually 32b on 100% of systems that had a2xx ;-)
I've picked this up locally and will push soon.. thanks
BR,
-R
> CovID: 1362461
> Signed-off-by: Eric Engestrom <e...@engestrom.ch>
> ---
> src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
> b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
> index 6829544..39418fc 100644
> --- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
> +++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
> @@ -402,10 +402,10 @@ add_src_reg(struct fd2_compile_context *ctx, struct
> ir2_instruction *alu,
> swiz[3] = swiz_vals[src->SwizzleW];
> swiz[4] = '\0';
>
> - if ((ctx->need_sync & (uint64_t)(1 << num)) &&
> + if ((ctx->need_sync & ((uint64_t)1 << num)) &&
> !(flags & IR2_REG_CONST)) {
> alu->sync = true;
> - ctx->need_sync &= ~(uint64_t)(1 << num);
> + ctx->need_sync &= ~((uint64_t)1 << num);
> }
>
> return ir2_reg_create(alu, num, swiz, flags);
> --
> 2.9.0
>
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