commit 6a0d036483caf87d43ebe2edd1905873446c9589 Author: Ben Widawsky <b...@bwidawsk.net> Date: Thu Apr 21 20:14:58 2016 -0700
i965: Always use Y-tiled buffers on SKL+ Aside from the benchmark gains that were initially posted, I was able to collect memory bandwidth data running kmscube (19x12 display). Without Writes: 6,583.58 MiB Reads: 6,540.93 MiB With Y-tiling: Writes: 5,361.78 MiB Reads 6,052.45 MiB Savings per frame Writes: 2 MiB Reads: .8 MiB v2: Use new modifier mechanism, and expose new DRIimage version Signed-off-by: Ben Widawsky <benjamin.widaw...@intel.com> Acked-by: Daniel Stone <dani...@collabora.com> --- src/mesa/drivers/dri/i965/intel_screen.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 9b3211c6e4..056da48a07 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -574,6 +574,14 @@ __intel_create_image(__DRIscreen *dri_screen, image->modifier = I915_FORMAT_MOD_X_TILED; break; case I915_FORMAT_MOD_Y_TILED: + /* Kernel provides no way to query support for this. Assume GEN check + * is enough :/ + */ + if (screen->devinfo.gen < 9) { + _mesa_warning(NULL, "Invalid Y-tiling parameter\n"); + continue; + } + image->modifier = I915_FORMAT_MOD_Y_TILED; break; } @@ -588,6 +596,11 @@ __intel_create_image(__DRIscreen *dri_screen, if (use & __DRI_IMAGE_USE_LINEAR) tiling = I915_TILING_NONE; + if (image->modifier == I915_FORMAT_MOD_Y_TILED) { + assert(tiling != I915_TILING_NONE); + tiling = I915_TILING_Y; + } + cpp = _mesa_get_format_bytes(image->format); image->bo = drm_intel_bo_alloc_tiled(screen->bufmgr, "image", width, height, cpp, &tiling, @@ -919,7 +932,7 @@ intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate) } static const __DRIimageExtension intelImageExtension = { - .base = { __DRI_IMAGE, 13 }, + .base = { __DRI_IMAGE, 14 }, .createImageFromName = intel_create_image_from_name, .createImageFromRenderbuffer = intel_create_image_from_renderbuffer, @@ -1794,7 +1807,13 @@ intelAllocateBuffer(__DRIscreen *dri_screen, return NULL; /* The front and back buffers are color buffers, which are X tiled. */ - uint32_t tiling = I915_TILING_X; + uint32_t tiling; + if (screen->devinfo.gen >= 9) { + tiling = I915_TILING_Y; + } else { + tiling = I915_TILING_X; + } + unsigned long pitch; int cpp = format / 8; intelBuffer->bo = drm_intel_bo_alloc_tiled(screen->bufmgr, -- 2.11.0 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev