Signed-off-by: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
---
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 065e317..98e023a 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -1208,6 +1208,15 @@ vec4_visitor::setup_imm_df(double v)
if (devinfo->gen >= 8)
return brw_imm_df(v);
+ /* gen7.5 does not support DF immediates straighforward but the DIM
+ * instruction allows to set the 64-bit immediate value.
+ */
+ if (devinfo->is_haswell) {
+ dst_reg dst = retype(dst_reg(VGRF, alloc.allocate(2)),
BRW_REGISTER_TYPE_DF);
+ emit(DIM(dst, brw_imm_df(v)))->force_writemask_all = true;
+ return swizzle(src_reg(retype(dst, BRW_REGISTER_TYPE_DF)),
BRW_SWIZZLE_XXXX);
+ }
+
/* gen7 does not support DF immediates */
union {
double d;
--
2.7.4
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