Hi guys,
I've rebased and updated the i965 cache on master which now contains
most of the GLSL IR cache pieces. There are 4 extra GLSL IR patches
required by i965 as it needs to fallback to compiling GLSL IR if there
is a cache miss at draw time (radeonsi will always have tgsi so doesn't
require this extra step).
There are two more pieces required to hook up and enabled the cache
(which will still be disabled by default).
1. Call disk_cache_create(); in the patch "i965: make use of on disk
shader cache" when brw_context is created. We need to pass the unique
mesa id and the gpu gen to it as strings, as far as I can tell there is
currently nothing we can reuse to create the gpu id string.
2. Add cache support for the compute stage, see "i965: add shader cache
support for geometry shaders" as an example of how to do this.
The latest patches are in the shader-cache41 branch of
https://github.com/tarceri/Mesa.git
So if anyone wants to pick this up, go for it :)
I was originally planning on finishing this up myself but I've got a lot
of spinning up on radeonsi and llvm to do so I thought I'd pass it off
to someone who will give it their full attention.
Thanks,
Tim
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