Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com> --- src/mesa/drivers/dri/i965/brw_context.c | 80 +++++++++++++++++++-------------- 1 file changed, 47 insertions(+), 33 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 9ca1ac1..f4ebaf2 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -277,6 +277,51 @@ brw_prepare_textures(struct gl_context *ctx) return flush; } +static enum intel_write_cache_flush_type +brw_prepare_image_surfaces(struct gl_context *ctx) +{ + struct brw_context *brw = brw_context(ctx); + enum intel_write_cache_flush_type flush = INTEL_WRITE_CACHE_NO_FLUSH; + + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { + const struct gl_program *prog = ctx->_Shader->CurrentProgram[i]; + + if (!prog || prog->info.num_images == 0) + continue; + + for (unsigned j = 0; j < prog->info.num_images; j++) { + struct gl_image_unit *u = + &ctx->ImageUnits[prog->sh.ImageUnits[j]]; + struct intel_texture_object * const tex_obj = + intel_texture_object(u->TexObj); + + if (!tex_obj || !tex_obj->mt) + continue; + + /* Access to images is implemented using indirect messages + * against data port. Normal render target write understands + * lossless compression but unfortunately the typed/untyped + * read/write interface doesn't. Therefore even lossless + * compressed surfaces need to be resolved prior to accessing + * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E. + */ + if (intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0)) + flush |= INTEL_WRITE_CACHE_SYNC; + + if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) && + intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) { + perf_debug("Using renderbuffer as shader image - turning " + "off lossless compression"); + } + + if (_mesa_set_search(brw->render_cache, tex_obj->mt->bo) != NULL) + flush |= INTEL_WRITE_CACHE_FLUSH; + } + } + + return flush; +} + static bool intel_resolve_and_sync_surfaces(struct gl_context *ctx) { @@ -287,7 +332,8 @@ intel_resolve_and_sync_surfaces(struct gl_context *ctx) PIPE_CONTROL_RENDER_TARGET_FLUSH; const enum intel_write_cache_flush_type flush = - brw_prepare_textures(ctx); + brw_prepare_textures(ctx) | + brw_prepare_image_surfaces(ctx); if (flush == INTEL_WRITE_CACHE_NO_FLUSH) return false; @@ -356,38 +402,6 @@ intel_update_state(struct gl_context * ctx, GLuint new_state) } } - /* Resolve color for each active shader image. */ - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - const struct gl_program *prog = ctx->_Shader->CurrentProgram[i]; - - if (unlikely(prog && prog->info.num_images)) { - for (unsigned j = 0; j < prog->info.num_images; j++) { - struct gl_image_unit *u = - &ctx->ImageUnits[prog->sh.ImageUnits[j]]; - tex_obj = intel_texture_object(u->TexObj); - - if (tex_obj && tex_obj->mt) { - /* Access to images is implemented using indirect messages - * against data port. Normal render target write understands - * lossless compression but unfortunately the typed/untyped - * read/write interface doesn't. Therefore even lossless - * compressed surfaces need to be resolved prior to accessing - * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E. - */ - intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0); - - if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) && - intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) { - perf_debug("Using renderbuffer as shader image - turning " - "off lossless compression"); - } - - brw_render_cache_set_check_flush(brw, tex_obj->mt->bo); - } - } - } - } - /* Resolve color buffers for non-coherent framebuffer fetch. */ if (!ctx->Extensions.MESA_shader_framebuffer_fetch && ctx->FragmentProgram._Current && -- 2.5.5 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev