On 11/23/2011 07:30 AM, Kenneth Graunke wrote: > See intel_vertical_texture_alignment_unit() in intel_tex_layout.c; > certain surface types require setting this to VALIGN_4. > > Analogous to commit dd0e46c4102976b7d317104ecd1bb565ac34613a on Gen6. > > Fixes piglit test fbo-generatemipmap-formats with the > GL_ARB_depth_texture and GL_EXT_packed_depth_stencil arguments. > > Signed-off-by: Kenneth Graunke <kenn...@whitecape.org> > --- > src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c > b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c > index ec72c1e..82a3077 100644 > --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c > +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c > @@ -59,6 +59,7 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint > unit) > struct brw_context *brw = brw_context(ctx); > struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; > struct intel_texture_object *intelObj = intel_texture_object(tObj); > + struct intel_mipmap_tree *mt = intelObj->mt; > struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel]; > struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit); > const GLuint surf_index = SURF_INDEX_TEXTURE(unit); > @@ -71,6 +72,9 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint > unit) > sizeof(*surf), 32, > &brw->bind.surf_offset[surf_index]); > memset(surf, 0, sizeof(*surf)); > > + if (mt->align_h == 4) > + surf->ss0.vertical_alignment = 1; > + > surf->ss0.surface_type = translate_tex_target(tObj->Target); > surf->ss0.surface_format = translate_tex_format(firstImage->TexFormat, > > firstImage->InternalFormat,
You need to also set the bit in gen7_update_renderbuffer_surface(). ---- Chad Versace chad.vers...@linux.intel.com _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev