From: Daniel Vetter <daniel.vet...@ffwll.ch>

Iirc this was used by uxa for persistent mmpas of the frontbuffer. For
mesa all the set_domain stuff needed before a synchronized mmap is handled
within the bufmgr, so no reason ever to call this.

Inline the implementation into its only internal user.

Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
---
 src/mesa/drivers/dri/i965/brw_bufmgr.c | 41 ++++++++++++----------------------
 src/mesa/drivers/dri/i965/brw_bufmgr.h |  2 --
 2 files changed, 14 insertions(+), 29 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c 
b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index 54206293de4..080a4bd6f1a 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
@@ -1000,7 +1000,20 @@ brw_bo_get_subdata(struct brw_bo *bo, unsigned long 
offset,
 void
 brw_bo_wait_rendering(struct brw_bo *bo)
 {
-   brw_bo_start_gtt_access(bo, 1);
+   struct brw_bufmgr *bufmgr = bo->bufmgr;
+   struct drm_i915_gem_set_domain set_domain;
+   int ret;
+
+   memclear(set_domain);
+   set_domain.handle = bo->gem_handle;
+   set_domain.read_domains = I915_GEM_DOMAIN_GTT;
+   set_domain.write_domain = I915_GEM_DOMAIN_GTT;
+   ret = drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
+   if (ret != 0) {
+      DBG("%s:%d: Error setting memory domains %d (%08x %08x): %s .\n",
+          __FILE__, __LINE__, bo->gem_handle,
+          set_domain.read_domains, set_domain.write_domain, strerror(errno));
+   }
 }
 
 /**
@@ -1047,32 +1060,6 @@ brw_bo_wait(struct brw_bo *bo, int64_t timeout_ns)
    return ret;
 }
 
-/**
- * Sets the object to the GTT read and possibly write domain, used by the X
- * 2D driver in the absence of kernel support to do brw_bo_map_gtt().
- *
- * In combination with brw_bo_pin() and manual fence management, we
- * can do tiled pixmaps this way.
- */
-void
-brw_bo_start_gtt_access(struct brw_bo *bo, int write_enable)
-{
-   struct brw_bufmgr *bufmgr = bo->bufmgr;
-   struct drm_i915_gem_set_domain set_domain;
-   int ret;
-
-   memclear(set_domain);
-   set_domain.handle = bo->gem_handle;
-   set_domain.read_domains = I915_GEM_DOMAIN_GTT;
-   set_domain.write_domain = write_enable ? I915_GEM_DOMAIN_GTT : 0;
-   ret = drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
-   if (ret != 0) {
-      DBG("%s:%d: Error setting memory domains %d (%08x %08x): %s .\n",
-          __FILE__, __LINE__, bo->gem_handle,
-          set_domain.read_domains, set_domain.write_domain, strerror(errno));
-   }
-}
-
 void
 brw_bufmgr_destroy(struct brw_bufmgr *bufmgr)
 {
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.h 
b/src/mesa/drivers/dri/i965/brw_bufmgr.h
index 53d51f2a59d..170909d0ba2 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.h
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.h
@@ -278,8 +278,6 @@ void *brw_bo_map__cpu(struct brw_bo *bo);
 void *brw_bo_map__gtt(struct brw_bo *bo);
 void *brw_bo_map__wc(struct brw_bo *bo);
 
-void brw_bo_start_gtt_access(struct brw_bo *bo, int write_enable);
-
 int brw_bo_wait(struct brw_bo *bo, int64_t timeout_ns);
 
 uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
-- 
2.12.1

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