On 29 April 2017 at 14:24, Ilia Mirkin <imir...@alum.mit.edu> wrote:
> On Sat, Apr 29, 2017 at 9:18 AM, Emil Velikov <emil.l.veli...@gmail.com> 
> wrote:
>> On 18 April 2017 at 05:00, Ilia Mirkin <imir...@alum.mit.edu> wrote:
>>> val_bool and val_int are in a union. val_bool gets the first byte, which
>>> happens to work on LE when setting via the int, but breaks on BE. By
>>> setting the value properly, we are able to use DRI3 on BE architectures.
>>> Tested by running glxgears with a NV34 in a G5 PPC.
>>>
>>> Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
>>> Cc: mesa-sta...@lists.freedesktop.org
>>> ---
>>>  src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c | 8 ++++----
>>>  src/gallium/targets/pipe-loader/pipe_i915.c         | 2 +-
>>>  src/gallium/targets/pipe-loader/pipe_msm.c          | 2 +-
>>>  src/gallium/targets/pipe-loader/pipe_nouveau.c      | 2 +-
>>>  src/gallium/targets/pipe-loader/pipe_r300.c         | 2 +-
>>>  src/gallium/targets/pipe-loader/pipe_r600.c         | 2 +-
>>>  src/gallium/targets/pipe-loader/pipe_radeonsi.c     | 2 +-
>>>  7 files changed, 10 insertions(+), 10 deletions(-)
>>>
>> A while ago I've managed to half the duplication, but we still have some ;-)
>>
>> With the vmwgfx hunk squashed:
>> Reviewed-by: Emil Velikov <emil.l.veli...@gmail.com>
>
> Thanks. I totally forgot about this... will try to push it out today.
> Feel free to do it for me if you like.
>
Done + fixed up the patchwork bits.
Feel free to parse through the latter - you might notice a few other
patches that have fallen through the cracks

-Emil
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