This series is Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
On Wed, Jun 7, 2017 at 1:31 AM, Grazvydas Ignotas <nota...@gmail.com> wrote: > Most functions are only inspecting nir, so nir related arguments can be > marked const. Some more can be done if/when some nir changes are > accepted. > > Signed-off-by: Grazvydas Ignotas <nota...@gmail.com> > --- > does *not* depend on the nir patch > > src/amd/common/ac_nir_to_llvm.c | 61 > +++++++++++++++++++++-------------------- > 1 file changed, 31 insertions(+), 30 deletions(-) > > diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c > index 4e5d19a..5f62769 100644 > --- a/src/amd/common/ac_nir_to_llvm.c > +++ b/src/amd/common/ac_nir_to_llvm.c > @@ -174,11 +174,11 @@ struct nir_to_llvm_context { > uint64_t tess_outputs_written; > uint64_t tess_patch_outputs_written; > }; > > static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx, > - nir_deref_var *deref, > + const nir_deref_var *deref, > enum desc_type desc_type); > static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan) > { > return (index * 4) + chan; > } > @@ -1077,11 +1077,11 @@ build_store_values_extended(struct > nir_to_llvm_context *ctx, > LLVMBuildStore(builder, value, ptr); > } > } > > static LLVMTypeRef get_def_type(struct nir_to_llvm_context *ctx, > - nir_ssa_def *def) > + const nir_ssa_def *def) > { > LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, def->bit_size); > if (def->num_components > 1) { > type = LLVMVectorType(type, def->num_components); > } > @@ -1095,11 +1095,11 @@ static LLVMValueRef get_src(struct > nir_to_llvm_context *ctx, nir_src src) > return (LLVMValueRef)entry->data; > } > > > static LLVMBasicBlockRef get_block(struct nir_to_llvm_context *ctx, > - struct nir_block *b) > + const struct nir_block *b) > { > struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, b); > return (LLVMBasicBlockRef)entry->data; > } > > @@ -1385,11 +1385,11 @@ static LLVMValueRef emit_imul_high(struct > nir_to_llvm_context *ctx, > return result; > } > > static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx, > bool is_signed, > - LLVMValueRef srcs[3]) > + const LLVMValueRef srcs[3]) > { > LLVMValueRef result; > LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], > LLVMConstInt(ctx->i32, 32, false), ""); > > result = ac_build_bfe(&ctx->ac, srcs[0], srcs[1], srcs[2], is_signed); > @@ -1524,11 +1524,11 @@ static LLVMValueRef emit_ddxy_interp( > result[2+i] = emit_ddxy(ctx, nir_op_fddy, a); > } > return ac_build_gather_values(&ctx->ac, result, 4); > } > > -static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr) > +static void visit_alu(struct nir_to_llvm_context *ctx, const nir_alu_instr > *instr) > { > LLVMValueRef src[4], result = NULL; > unsigned num_components = instr->dest.dest.ssa.num_components; > unsigned src_components; > LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa); > @@ -1890,11 +1890,11 @@ static void visit_alu(struct nir_to_llvm_context > *ctx, nir_alu_instr *instr) > result); > } > } > > static void visit_load_const(struct nir_to_llvm_context *ctx, > - nir_load_const_instr *instr) > + const nir_load_const_instr *instr) > { > LLVMValueRef values[4], value = NULL; > LLVMTypeRef element_type = > LLVMIntTypeInContext(ctx->context, instr->def.bit_size); > > @@ -1974,11 +1974,11 @@ static void build_int_type_name( > strcpy(buf, "i32"); > } > > static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context > *ctx, > struct ac_image_args *args, > - nir_tex_instr *instr) > + const nir_tex_instr *instr) > { > enum glsl_base_type stype = > glsl_get_sampler_result_type(instr->texture->var->type); > LLVMValueRef coord = args->addr; > LLVMValueRef half_texel[2]; > LLVMValueRef compare_cube_wa; > @@ -2087,11 +2087,11 @@ static LLVMValueRef radv_lower_gather4_integer(struct > nir_to_llvm_context *ctx, > } > return result; > } > > static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx, > - nir_tex_instr *instr, > + const nir_tex_instr *instr, > bool lod_is_zero, > struct ac_image_args *args) > { > if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) { > return ac_build_buffer_load_format(&ctx->ac, > @@ -2200,11 +2200,11 @@ static LLVMValueRef visit_load_push_constant(struct > nir_to_llvm_context *ctx, > > return LLVMBuildLoad(ctx->builder, ptr, ""); > } > > static LLVMValueRef visit_get_buffer_size(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef desc = get_src(ctx, instr->src[0]); > > return get_buffer_size(ctx, desc, false); > } > @@ -2293,11 +2293,11 @@ static void visit_store_ssbo(struct > nir_to_llvm_context *ctx, > ctx->voidt, params, 6, 0); > } > } > > static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > const char *name; > LLVMValueRef params[6]; > int arg_count = 0; > if (ctx->stage == MESA_SHADER_FRAGMENT) > @@ -2349,11 +2349,11 @@ static LLVMValueRef visit_atomic_ssbo(struct > nir_to_llvm_context *ctx, > > return ac_build_intrinsic(&ctx->ac, name, ctx->i32, params, > arg_count, 0); > } > > static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef results[2]; > int load_components; > int num_components = instr->num_components; > if (instr->dest.ssa.bit_size == 64) > @@ -2409,11 +2409,11 @@ static LLVMValueRef visit_load_buffer(struct > nir_to_llvm_context *ctx, > return LLVMBuildBitCast(ctx->builder, ret, > get_def_type(ctx, &instr->dest.ssa), ""); > } > > static LLVMValueRef visit_load_ubo_buffer(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef results[8], ret; > LLVMValueRef rsrc = get_src(ctx, instr->src[0]); > LLVMValueRef offset = get_src(ctx, instr->src[1]); > int num_components = instr->num_components; > @@ -2804,11 +2804,11 @@ store_tcs_output(struct nir_to_llvm_context *ctx, > } > } > > static LLVMValueRef > load_tes_input(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef buf_addr; > LLVMValueRef result; > LLVMValueRef vertex_index = NULL; > LLVMValueRef indir_index = NULL; > @@ -3206,11 +3206,11 @@ static LLVMValueRef > adjust_sample_index_using_fmask(struct nir_to_llvm_context * > final_sample, sample_index, ""); > return sample_index; > } > > static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > const struct glsl_type *type = instr->variables[0]->var->type; > if(instr->variables[0]->deref.child) > type = instr->variables[0]->deref.child->type; > > @@ -3284,11 +3284,11 @@ static LLVMValueRef get_image_coords(struct > nir_to_llvm_context *ctx, > } > return res; > } > > static LLVMValueRef visit_image_load(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef params[7]; > LLVMValueRef res; > char intrinsic_name[64]; > const nir_variable *var = instr->variables[0]->var; > @@ -3400,11 +3400,11 @@ static void visit_image_store(struct > nir_to_llvm_context *ctx, > } > > } > > static LLVMValueRef visit_image_atomic(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef params[6]; > int param_count = 0; > const nir_variable *var = instr->variables[0]->var; > > @@ -3474,11 +3474,11 @@ static LLVMValueRef visit_image_atomic(struct > nir_to_llvm_context *ctx, > "%s.%s.%s", base_name, atomic_name, coords_type); > return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->i32, params, > param_count, 0); > } > > static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef res; > const nir_variable *var = instr->variables[0]->var; > const struct glsl_type *type = instr->variables[0]->var->type; > bool da = glsl_sampler_type_is_array(var->type) || > @@ -3538,11 +3538,11 @@ static void emit_barrier(struct nir_to_llvm_context > *ctx) > ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.s.barrier", > ctx->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT); > } > > static void emit_discard_if(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef cond; > ctx->shader_info->fs.can_discard = true; > > cond = LLVMBuildICmp(ctx->builder, LLVMIntNE, > @@ -3565,11 +3565,11 @@ visit_load_local_invocation_index(struct > nir_to_llvm_context *ctx) > > return LLVMBuildAdd(ctx->builder, result, thread_id, ""); > } > > static LLVMValueRef visit_var_atomic(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef ptr, result; > int idx = instr->variables[0]->var->data.driver_location; > LLVMValueRef src = get_src(ctx, instr->src[0]); > ptr = get_shared_memory_ptr(ctx, idx, ctx->i32); > @@ -3677,11 +3677,11 @@ static LLVMValueRef load_sample_pos(struct > nir_to_llvm_context *ctx) > values[1] = emit_ffract(ctx, ctx->frag_pos[1]); > return ac_build_gather_values(&ctx->ac, values, 2); > } > > static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef result[2]; > LLVMValueRef interp_param, attr_number; > unsigned location; > unsigned chan; > @@ -3782,11 +3782,11 @@ static LLVMValueRef visit_interp(struct > nir_to_llvm_context *ctx, > return ac_build_gather_values(&ctx->ac, result, 2); > } > > static void > visit_emit_vertex(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef gs_next_vertex; > LLVMValueRef can_emit, kill; > int idx; > > @@ -3850,18 +3850,18 @@ visit_emit_vertex(struct nir_to_llvm_context *ctx, > ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS | (0 > << 8), ctx->gs_wave_id); > } > > static void > visit_end_primitive(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_CUT | AC_SENDMSG_GS | (0 > << 8), ctx->gs_wave_id); > } > > static LLVMValueRef > visit_load_tess_coord(struct nir_to_llvm_context *ctx, > - nir_intrinsic_instr *instr) > + const nir_intrinsic_instr *instr) > { > LLVMValueRef coord[4] = { > ctx->tes_u, > ctx->tes_v, > ctx->f32zero, > @@ -4055,12 +4055,12 @@ static void visit_intrinsic(struct > nir_to_llvm_context *ctx, > _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result); > } > } > > static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx, > - nir_deref_var *deref, > - enum desc_type desc_type) > + const nir_deref_var *deref, > + enum desc_type desc_type) > { > unsigned desc_set = deref->var->data.descriptor_set; > LLVMValueRef list = ctx->descriptor_sets[desc_set]; > struct radv_descriptor_set_layout *layout = > ctx->options->layout->set[desc_set].layout; > struct radv_descriptor_set_binding_layout *binding = layout->binding > + deref->var->data.binding; > @@ -4098,11 +4098,12 @@ static LLVMValueRef get_sampler_desc(struct > nir_to_llvm_context *ctx, > default: > unreachable("invalid desc_type\n"); > } > > if (deref->deref.child) { > - nir_deref_array *child = (nir_deref_array*)deref->deref.child; > + const nir_deref_array *child = > + (const nir_deref_array *)deref->deref.child; > > assert(child->deref_array_type != > nir_deref_array_type_wildcard); > offset += child->base_offset * stride; > if (child->deref_array_type == nir_deref_array_type_indirect) > { > index = get_src(ctx, child->indirect); > @@ -4139,11 +4140,11 @@ static LLVMValueRef get_sampler_desc(struct > nir_to_llvm_context *ctx, > return ac_build_indexed_load_const(&ctx->ac, list, index); > } > > static void set_tex_fetch_args(struct nir_to_llvm_context *ctx, > struct ac_image_args *args, > - nir_tex_instr *instr, > + const nir_tex_instr *instr, > nir_texop op, > LLVMValueRef res_ptr, LLVMValueRef samp_ptr, > LLVMValueRef *param, unsigned count, > unsigned dmask) > { > @@ -4553,11 +4554,11 @@ static void phi_post_pass(struct nir_to_llvm_context > *ctx) > } > } > > > static void visit_ssa_undef(struct nir_to_llvm_context *ctx, > - nir_ssa_undef_instr *instr) > + const nir_ssa_undef_instr *instr) > { > unsigned num_components = instr->def.num_components; > LLVMValueRef undef; > > if (num_components == 1) > @@ -4567,11 +4568,11 @@ static void visit_ssa_undef(struct > nir_to_llvm_context *ctx, > } > _mesa_hash_table_insert(ctx->defs, &instr->def, undef); > } > > static void visit_jump(struct nir_to_llvm_context *ctx, > - nir_jump_instr *instr) > + const nir_jump_instr *instr) > { > switch (instr->type) { > case nir_jump_break: > LLVMBuildBr(ctx->builder, ctx->break_block); > LLVMClearInsertionPosition(ctx->builder); > @@ -5862,11 +5863,11 @@ ac_setup_rings(struct nir_to_llvm_context *ctx) > } > } > > static unsigned > ac_nir_get_max_workgroup_size(enum chip_class chip_class, > - struct nir_shader *nir) > + const struct nir_shader *nir) > { > switch (nir->stage) { > case MESA_SHADER_TESS_CTRL: > return chip_class >= CIK ? 128 : 64; > case MESA_SHADER_GEOMETRY: > -- > 2.7.4 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev