From: Nicolai Hähnle <nicolai.haeh...@amd.com>

This improves the separation of ABI and NIR translation.
---
 src/amd/common/ac_nir_to_llvm.c | 7 +++++--
 src/amd/common/ac_shader_info.c | 3 +++
 src/amd/common/ac_shader_info.h | 1 +
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9d06a19..ecb04e4 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3914,22 +3914,20 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
                result = load_sample_pos(ctx->nctx);
                break;
        case nir_intrinsic_load_sample_mask_in:
                result = ctx->nctx->sample_coverage;
                break;
        case nir_intrinsic_load_front_face:
                result = ctx->nctx->front_face;
                break;
        case nir_intrinsic_load_instance_id:
                result = LLVMGetParam(ctx->main_function, 
ctx->abi->param_instance_id);
-               ctx->nctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
-                                           
ctx->nctx->shader_info->vs.vgpr_comp_cnt);
                break;
        case nir_intrinsic_load_num_work_groups:
                result = ctx->nctx->num_work_groups;
                break;
        case nir_intrinsic_load_local_invocation_index:
                result = visit_load_local_invocation_index(ctx->nctx);
                break;
        case nir_intrinsic_load_push_constant:
                result = visit_load_push_constant(ctx->nctx, instr);
                break;
@@ -6054,20 +6052,25 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
                                                          LOCAL_ADDR_SPACE);
                        LLVMSetAlignment(var, 4);
                        ctx.shared_memory = LLVMBuildBitCast(ctx.builder, var, 
i8p, "");
                }
        } else if (nir->stage == MESA_SHADER_GEOMETRY) {
                ctx.gs_next_vertex = ac_build_alloca(&ctx.ac, ctx.i32, 
"gs_next_vertex");
 
                ctx.gs_max_out_vertices = nir->info.gs.vertices_out;
        } else if (nir->stage == MESA_SHADER_TESS_EVAL) {
                ctx.tes_primitive_mode = nir->info.tess.primitive_mode;
+       } else if (nir->stage == MESA_SHADER_VERTEX) {
+               if (shader_info->info.vs.needs_instance_id) {
+                       ctx.shader_info->vs.vgpr_comp_cnt =
+                               MAX2(3, ctx.shader_info->vs.vgpr_comp_cnt);
+               }
        }
 
        ac_setup_rings(&ctx);
 
        ctx.num_output_clips = nir->info.clip_distance_array_size;
        ctx.num_output_culls = nir->info.cull_distance_array_size;
 
        nir_foreach_variable(variable, &nir->inputs)
                handle_shader_input_decl(&ctx, variable);
 
diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index 13d73df..7d34535 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -32,20 +32,23 @@ static void mark_sampler_desc(nir_variable *var, struct 
ac_shader_info *info)
 static void
 gather_intrinsic_info(nir_intrinsic_instr *instr, struct ac_shader_info *info)
 {
        switch (instr->intrinsic) {
        case nir_intrinsic_interp_var_at_sample:
                info->ps.needs_sample_positions = true;
                break;
        case nir_intrinsic_load_draw_id:
                info->vs.needs_draw_id = true;
                break;
+       case nir_intrinsic_load_instance_id:
+               info->vs.needs_instance_id = true;
+               break;
        case nir_intrinsic_load_num_work_groups:
                info->cs.grid_components_used = instr->num_components;
                break;
        case nir_intrinsic_vulkan_resource_index:
                info->desc_set_used_mask |= (1 << 
nir_intrinsic_desc_set(instr));
                break;
        case nir_intrinsic_image_load:
        case nir_intrinsic_image_store:
        case nir_intrinsic_image_atomic_add:
        case nir_intrinsic_image_atomic_min:
diff --git a/src/amd/common/ac_shader_info.h b/src/amd/common/ac_shader_info.h
index 5f03e79..5bc16cc 100644
--- a/src/amd/common/ac_shader_info.h
+++ b/src/amd/common/ac_shader_info.h
@@ -26,20 +26,21 @@
 
 struct nir_shader;
 struct ac_nir_compiler_options;
 
 struct ac_shader_info {
        bool needs_push_constants;
        uint32_t desc_set_used_mask;
        struct {
                bool has_vertex_buffers; /* needs vertex buffers and base/start 
*/
                bool needs_draw_id;
+               bool needs_instance_id;
        } vs;
        struct {
                bool needs_sample_positions;
        } ps;
        struct {
                uint8_t grid_components_used;
        } cs;
 };
 
 /* A NIR pass to gather all the info needed to optimise the allocation patterns
-- 
2.9.3

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