From: Ian Romanick <ian.d.roman...@intel.com>
text data bss dec hex filename
7155954 256860 37332 7450146 71ae22 32-bit i965_dri.so before
7155858 256860 37332 7450050 71adc2 32-bit i965_dri.so after
6789395 328056 50704 7168155 6d609b 64-bit i965_dri.so before
6789299 328056 50704 7168059 6d603b 64-bit i965_dri.so after
Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
---
src/mesa/drivers/dri/i965/brw_clear.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c
b/src/mesa/drivers/dri/i965/brw_clear.c
index 7fbaa3a..1e434c9 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -99,7 +99,7 @@ noop_scissor(struct gl_framebuffer *fb)
* at least until a resolve to the real depth buffer happens.
*/
static bool
-brw_fast_clear_depth(struct gl_context *ctx)
+brw_fast_clear_depth(struct gl_context *ctx, bool partial_clear)
{
struct brw_context *brw = brw_context(ctx);
struct gl_framebuffer *fb = ctx->DrawBuffer;
@@ -118,7 +118,7 @@ brw_fast_clear_depth(struct gl_context *ctx)
* a previous clear had happened at a different clear value and resolve it
* first.
*/
- if ((ctx->Scissor.EnableFlags & 1) && !noop_scissor(fb)) {
+ if (partial_clear) {
perf_debug("Failed to fast clear %dx%d depth because of scissors. "
"Possible 5%% performance win if avoided.\n",
mt->logical_width0, mt->logical_height0);
@@ -213,7 +213,7 @@ brw_clear(struct gl_context *ctx, GLbitfield mask)
brw_workaround_depthstencil_alignment(brw, partial_clear ? 0 : mask);
if (mask & BUFFER_BIT_DEPTH) {
- if (brw_fast_clear_depth(ctx)) {
+ if (brw_fast_clear_depth(ctx, partial_clear)) {
DBG("fast clear: depth\n");
mask &= ~BUFFER_BIT_DEPTH;
}
--
2.9.4
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