> On Jul 6, 2017, at 19:02, Connor Abbott <cwabbo...@gmail.com> wrote: > > On Thu, Jul 6, 2017 at 6:36 PM, Matt Arsenault <arse...@gmail.com> wrote: >> >> On Jul 6, 2017, at 18:31, Connor Abbott <cwabbo...@gmail.com> wrote: >> >> After looking into it some more, I think LLVM won't promote allocas to >> registers at all when there are non-constant indices in the mix, and >> fixing it seems kinda involved. I guess a better solution for now >> >> >> AMDGPUPromoteAlloca does this, but it doesn’t happen very often > > Could we just bump the heuristic on maximum size there to match > radeonsi? That way we wouldn't need to have these heuristics in > radeonsi and radv. As-is, we're second-guessing the backend.
There’s also a vague plan to replace this with a machine level pass later that has more knowledge of register pressure. The current pass is pretty stupid and doesn’t even attempt to decide if it’s a good idea for a specific alloca. -Matt _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
