From: Marek Olšák <marek.ol...@amd.com>

This is overly cautious, but better safe than sorry.
---
 src/gallium/drivers/radeonsi/si_state_shaders.c | 17 ++---------------
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index f1170be..619ad9f 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -2935,51 +2935,38 @@ static bool si_update_spi_tmpring_size(struct 
si_context *sctx)
                si_mark_atom_dirty(sctx, &sctx->scratch_state);
        }
        return true;
 }
 
 static void si_init_tess_factor_ring(struct si_context *sctx)
 {
        bool double_offchip_buffers = sctx->b.chip_class >= CIK &&
                                      sctx->b.family != CHIP_CARRIZO &&
                                      sctx->b.family != CHIP_STONEY;
-       unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64;
+       /* This must be one less than the maximum number due to a hw 
limitation. */
+       unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 127 : 63;
        unsigned max_offchip_buffers = max_offchip_buffers_per_se *
                                       sctx->screen->b.info.max_se;
        unsigned offchip_granularity;
 
        switch (sctx->screen->tess_offchip_block_dw_size) {
        default:
                assert(0);
                /* fall through */
        case 8192:
                offchip_granularity = V_03093C_X_8K_DWORDS;
                break;
        case 4096:
                offchip_granularity = V_03093C_X_4K_DWORDS;
                break;
        }
 
-       switch (sctx->b.chip_class) {
-       case SI:
-               max_offchip_buffers = MIN2(max_offchip_buffers, 126);
-               break;
-       case CIK:
-       case VI:
-       case GFX9:
-               max_offchip_buffers = MIN2(max_offchip_buffers, 508);
-               break;
-       default:
-               assert(0);
-               return;
-       }
-
        assert(!sctx->tf_ring);
        /* Use 64K alignment for both rings, so that we can pass the address
         * to shaders as one SGPR containing bits [16:47].
         */
        sctx->tf_ring = r600_aligned_buffer_create(sctx->b.b.screen,
                                                   
R600_RESOURCE_FLAG_UNMAPPABLE,
                                                   PIPE_USAGE_DEFAULT,
                                                   32768 * 
sctx->screen->b.info.max_se,
                                                   64 * 1024);
        if (!sctx->tf_ring)
-- 
2.7.4

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