On Fri, Jul 14, 2017 at 3:38 PM, Chad Versace <chadvers...@chromium.org> wrote:
> On Wed 12 Jul 2017, Jason Ekstrand wrote: > > --- > > src/mesa/drivers/dri/i965/intel_screen.c | 11 ++++++++++- > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > + /* We request that the bufmgr zero the buffer for us for two reasons: > > + * > > + * 1) If a buffer gets re-used from the pool, we don't want to leak > random > > + * garbage from our process to some other. > > + * > > + * 2) For images with CCS_E, we want to ensure that the CCS starts > off in > > + * a valid state. A CCS value of 0 indicates that the given > block is > > + * in the pass-through state which is what we want. > > + */ > > Bullet #2 should be postponed to a later patch, as the bo here does not > contain an aux surface until later in the series. > I moved it. > But that's a small nit. This is > Reviewed-by: Chad Versace <chadvers...@chromium.org> > Thanks! --Jason > > image->bo = brw_bo_alloc_tiled(screen->bufmgr, "image", surf.size, > > isl_tiling_to_i915_tiling(mod_ > info->tiling), > > - surf.row_pitch, 0); > > + surf.row_pitch, BO_ALLOC_ZEROED); >
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